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  • ✇Semiconductor Engineering
  • A Generic Approach For Fuzzing Arbitrary HypervisorsTechnical Paper Link
    A technical paper titled “HYPERPILL: Fuzzing for Hypervisor-bugs by Leveraging the Hardware Virtualization Interface” was presented at the August 2024 USENIX Security Symposium by researchers at EPFL, Boston University, and Zhejiang University. Abstract: “The security guarantees of cloud computing depend on the isolation guarantees of the underlying hypervisors. Prior works have presented effective methods for automatically identifying vulnerabilities in hypervisors. However, these approaches ar
     

A Generic Approach For Fuzzing Arbitrary Hypervisors

A technical paper titled “HYPERPILL: Fuzzing for Hypervisor-bugs by Leveraging the Hardware Virtualization Interface” was presented at the August 2024 USENIX Security Symposium by researchers at EPFL, Boston University, and Zhejiang University.

Abstract:

“The security guarantees of cloud computing depend on the isolation guarantees of the underlying hypervisors. Prior works have presented effective methods for automatically identifying vulnerabilities in hypervisors. However, these approaches are limited in scope. For instance, their implementation is typically hypervisor-specific and limited by requirements for detailed grammars, access to source-code, and assumptions about hypervisor behaviors. In practice, complex closed-source and recent open-source hypervisors are often not suitable for off-the-shelf fuzzing techniques.

HYPERPILL introduces a generic approach for fuzzing arbitrary hypervisors. HYPERPILL leverages the insight that although hypervisor implementations are diverse, all hypervisors rely on the identical underlying hardware-virtualization interface to manage virtual-machines. To take advantage of the hardware-virtualization interface, HYPERPILL makes a snapshot of the hypervisor, inspects the snapshotted hardware state to enumerate the hypervisor’s input-spaces, and leverages feedback-guided snapshot-fuzzing within an emulated environment to identify vulnerabilities in arbitrary hypervisors. In our evaluation, we found that beyond being the first hypervisor-fuzzer capable of identifying vulnerabilities in arbitrary hypervisors across all major attack-surfaces (i.e., PIO/MMIO/Hypercalls/DMA), HYPERPILL also outperforms state-of-the-art approaches that rely on access to source-code, due to the granularity of feedback provided by HYPERPILL’s emulation-based approach. In terms of coverage, HYPERPILL outperformed past fuzzers for 10/12 QEMU devices, without the API hooking or source-code instrumentation techniques required by prior works. HYPERPILL identified 26 new bugs in recent versions of QEMU, Hyper-V, and macOS Virtualization Framework across four device-categories.”

Find the technical paper here. Published August 2024. Distinguished Paper Award Winner.

Bulekov, Alexander, Qiang Liu, Manuel Egele, and Mathias Payer. “HYPERPILL: Fuzzing for Hypervisor-bugs by Leveraging the Hardware Virtualization Interface.” In 33rd USENIX Security Symposium (USENIX Security 24). 2024.

Further Reading
SRAM Security Concerns Grow
Volatile memory threat increases as chips are disaggregated into chiplets, making it easier to isolate memory and slow data degradation.

The post A Generic Approach For Fuzzing Arbitrary Hypervisors appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Chip Industry Week In ReviewThe SE Staff
    President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel is in advanced talks with Apollo Global Management for the equity firm to provide more than $11 billion to bui
     

Chip Industry Week In Review

17. Květen 2024 v 09:01

President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used.

Intel is in advanced talks with Apollo Global Management for the equity firm to provide more than $11 billion to build a fab in Ireland, reported the Wall Street Journal. Also, Intel’s Foundry Services appointed Kevin O’Buckley as the senior vice president and general manager.

Polar is slated to receive up to $120 million in CHIPS Act funding to establish an independent American foundry in Minnesota. The company expects to invest about $525 million in the expansion of the facility over the next two years, with a $75 million investment from the State of Minnesota.

Arm plans to develop AI chips for launch next year, reports Nikkei Asia.

South Korea is planning a support package worth more than 10 trillion won ($7.3 billion) aimed at chip materials, equipment makers, and fabless companies throughout the semiconductor supply chain, according to Reuters.

Quick links to more news:

Global
In-Depth
Markets and Money
Security
Supercomputing
Education and Training
Product News
Research
Events and Further Reading


Global

Edwards opened a new facility in Asan City, South Korea. The 15,000m² factory provides a key production site for abatement systems, and integrated vacuum and abatement systems for semiconductor manufacturing.

France’s courtship with mega-tech is paying off.  Microsoft is investing more than US $4 billion to expand its cloud computing and AI infrastructure, including bringing up to 25,000 advanced GPUs to the country by the end of 2025. The “Choose France” campaign also snagged US $1.3 billion from Amazon for cloud infrastructure expansion, genAI and more.

Toyota, Nissan, and Honda are teaming up on AI and chips for next-gen cars with support from Japan’s Ministry of Economy, Trade and Industry, (METI), reports Nikkei Asia.

Meanwhile, IBM and Honda are collaborating on long-term R&D of next-gen technologies for software-defined vehicles (SDV), including chiplets, brain-inspired computing, and hardware-software co-optimization.

Siemens and Foxconn plan to collaborate on global manufacturing processes in electronics, information and communications technology, and electric vehicles (EV).

TSMC confirmed a Q424 construction start date for its first European plant in Dresden, Germany.

Amazon Web Services (AWS) plans to invest €7.8 billion (~$8.4B) in the AWS European Sovereign Cloud in Germany through 2040. The system is designed to serve public sector organizations and customers in highly regulated industries.


In-Depth

Semiconductor Engineering published its Low Power-High Performance newsletter this week, featuring these stories:

And this week’s Test, Measurement & Analytics newsletter featured these stories:


Markets and Money

The U.S. National Institute of Standards and Technology (NIST) awarded more than $1.2 million to 12 businesses in 8 states under the Small Business Innovation Research (SBIR) Program to fund R&D of products relating to cybersecurity, quantum computing, health care, semiconductor manufacturing, and other critical areas.

Engineering services and consulting company Infosys completed the acquisition of InSemi Technology, a provider of semiconductor design and embedded software development services.

The quantum market, which includes quantum networking and sensors alongside computing, is predicted to grow from $838 million in 2024 to $1.8 billion in 2029, reports Yole.

Shipments of OLED monitors reached about 200,000 units in Q1 2024, a year over year growth of 121%, reports TrendForce.

Global EV sales grew 18% in Q1 2024 with plug-in hybrid electric vehicles (PHEV) sales seeing 46% YoY growth and battery electric vehicle (BEV) sales growing just 7%, according to Counterpoint. China leads global EV sales with 28% YoY growth, while the US grew just 2%. Tesla saw a 9% YoY drop, but topped BEV sales with a 19% market share. BYD grew 13% YoY and exported about 100,000 EVs with 152% YoY growth, mainly in Southeast Asia.

DeepX raised $80.5 million in Series C funding for its on-device NPU IP and AI SoCs tailored for applications including physical security, robotics, and mobility.

MetisX raised $44 million in Series A funding for its memory solutions built on Compute Express Link (CXL) for accelerating large-scale data processing applications.


Security

While security experts have been warning of a growing threat in electronics for decades, there have been several recent fundamental changes that elevate the risk.

Synopsys and the Ponemon Institute released a report showing 54% of surveyed organizations suffered a software supply chain attack in the past year and 20% were not effective in their response. And 52% said their development teams use AI tools to generate code, but only 32% have processes to evaluate it for license, security, and quality risks.

Researchers at Ruhr University Bochum and TU Darmstadt presented a solution for the automated generation of fault-resistant circuits (AGEFA) and assessed the security of examples generated by AGEFA against side-channel analysis and fault injection.

TXOne reported on operational technology security and the most effective method for preventing production interruptions caused by cyber-attacks.

CrowdStrike and NVIDIA are collaborating to accelerate the use of analytics and AI in cybersecurity to help security teams combat modern cyberattacks, including AI-powered threats.

The National Institute of Standards and Technology (NIST) finalized its guidelines for protecting sensitive data, known as controlled unclassified information, aimed at organizations that do business with the federal government.

The Defense Advanced Research Projects Agency (DARPA) awarded BAE Systems a $12 million contract to solve thermal challenges limiting electronic warfare systems, particularly in GaN transistors.

Sigma Defense won a $4.7 million contract from the U.S. Army for an AI-powered virtual training environment, partnering with Brightline Interactive on a system that uses spatial computing and augmented intelligence workflows.

SkyWater’s advanced packaging operation in Florida has been accredited as a Category 1A Trusted Supplier by the Defense Microelectronics Activity (DMEA) of the U.S. Department of Defense (DoD).

Videos of two CWE-focused sessions from CVE/FIRST VulnCon 2024 were made available on the CWE YouTube Channel.

The Cybersecurity and Infrastructure Security Agency (CISA) issued a number of alerts/advisories.


Supercomputing

Supercomputers are battling for top dog.

The Frontier supercomputer at Oak Ridge National Laboratory (ORNL) retained the top spot on the Top500 list of the world’s fastest systems with an HPL score of 1.206 EFlop/s. The as-yet incomplete Aurora system at Argonne took second place, becoming the world’s second exascale system at 1.012 EFlop/s. The Green500 list, which tracks energy efficiency of compute, saw three new entrants take the top places.

Cerebras Systems, Sandia National Laboratory, Lawrence Livermore National Laboratory, and Los Alamos National Laboratory used Cerebras’ second generation Wafer Scale Engine to perform atomic scale molecular dynamics simulations at the millisecond scale, which they claim is 179X faster than the Frontier supercomputer.

UT Austin‘s Stampede3 Supercomputer is now in full production, serving the open science community through 2029.


Education and Training

SEMI announced the SEMI University Semiconductor Certification Programs to help alleviate the workforce skills gap. Its first two online courses are designed for new talent seeking careers in the industry, and experienced workers looking to keep their skills current.  Also, SEMI and other partners launched a European Chip Skills Academy Summer School in Italy.

Siemens created an industry credential program for engineering students that supplements a formal degree by validating industry knowledge and skills. Nonprofit agency ABET will provide accreditation. The first two courses are live at the University of Colorado Boulder (CU Boulder) and a series is planned with Pennsylvania State University (Penn State).

Syracuse University launched a $20 million Center for Advanced Semiconductor Manufacturing, with co-funding from Onondaga County.

Starting young is a good thing.  An Arizona school district, along with the University Of Arizona,  is creating a semiconductor program for high schoolers.


Product News

Siemens and Sony partnered to enable immersive engineering via a spatial content creation system, NX Immersive Designer, which includes Sony’s XR head-mounted display. The integration of hardware and software gives designers and engineers natural ways to interact with a digital twin. Siemens also extended its Xcelerator as a Service portfolio with solutions for product engineering and lifecycle management, cloud-based high-performance simulation, and manufacturing operations management. It will be available on Microsoft Azure, as well.

Advantest announced the newest addition to its portfolio of power supplies for the V93000 EXA Scale SoC test platform. The DC Scale XHC32 power supply offers 32 channels with single-instrument total current of up to 640A.

Fig. 1: Advantest’s DC Scale XHC32. Source: Advantest

Infineon released its XENSIV TLE49SR angle sensors, which can withstand stray magnetic fields of up to 8 mT, ideal for applications of safety-critical automotive chassis systems.

Google debuted its sixth generation Cloud TPU, 4.7X faster and 67% more energy-efficient than the previous generation, with double the high-bandwidth memory.

X-Silicon uncorked a RISC-V vector CPU, coupled with a Vulkan-enabled GPU ISA and AI/ML acceleration in a single processor core, aimed at embedded and IoT applications.

IBM expanded its Qiskit quantum software stack, including the stable release of its SDK for building, optimizing, and visualizing quantum circuits.

Northeastern University announced the general availability of testing and integration solutions for Open RAN through the Open6G Open Testing and Integration Center (Open 6G OTIC).


Research

The University of Glasgow received £3 million (~$3.8M) from the Engineering and Physical Sciences Research Council (EPSRC)’s Strategic Equipment Grant scheme to help establish “Analogue,” an Automated Nano Analysing, Characterisation and Additive Packaging Suite to research silicon chip integration and packaging.

EPFL researchers developed scalable photonic ICs, based on lithium tantalate.

DISCO developed a way to increase the diameter of diamond wafers that uses the KABRA process, a laser ingot slicing method.

CEA-Leti developed two complementary approaches for high performance photon detectors — a mercury cadmium telluride-based avalanche photodetector and a superconducting single photon detector.

Toshiba demonstrated storage capacities of over 30TB with two next-gen large capacity recording technologies for hard disk drives (HDDs): Heat Assisted Magnetic Recording (HAMR) and Microwave Assisted Magnetic Recording (MAMR).

Caltech neuroscientists reported that their brain-machine interface (BMI) worked successfully in a second human patient, following 2022’s first instance, proving the device is not dependent on one particular brain or one location in a brain.

Linköping University researchers developed a cheap, sustainable battery made from zinc and lignin, while ORNL researchers developed carbon-capture batteries.


Events and Further Reading

Find upcoming chip industry events here, including:

Event Date Location
European Test Symposium May 20 – 24 The Hague, Netherlands
NI Connect Austin 2024 May 20 – 22 Austin, Texas
ITF World 2024 (imec) May 21 – 22 Antwerp, Belgium
Embedded Vision Summit May 21 – 23 Santa Clara, CA
ASIP Virtual Seminar 2024 May 22 Online
Electronic Components and Technology Conference (ECTC) 2024 May 28 – 31 Denver, Colorado
Hardwear.io Security Trainings and Conference USA 2024 May 28 – Jun 1 Santa Clara, CA
SW Test Jun 3 – 5 Carlsbad, CA
IITC2024: Interconnect Technology Conference Jun 3 – 6 San Jose, CA
VOICE Developer Conference Jun 3 – 5 La Jolla, CA
CHIPS R&D Standardization Readiness Level Workshop Jun 4 – 5 Online and Boulder, CO
Find All Upcoming Events Here

Upcoming webinars are here.


Semiconductor Engineering’s latest newsletters:

Automotive, Security and Pervasive Computing
Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials

 

The post Chip Industry Week In Review appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Chip Industry Week In ReviewThe SE Staff
    Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry’s gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC process for chips used in smartphones and other 5G/6G mobile devices. The process uses wafer-to-wafer bond
     

Chip Industry Week In Review

3. Květen 2024 v 09:01

Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry’s gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea.

UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC process for chips used in smartphones and other 5G/6G mobile devices. The process uses wafer-to-wafer bonding technology to address radio frequency interference between stacked dies and reduces die size by 45%.

Fig. 1: UMC’s 3D IC solution for RFSOI technology. Source: UMC

The first programmable chip capable of shaping, splitting, and steering beams of light is now being produced by Skywater Technology and Lumotive. The technology is critical for advancing lidar-based systems used in robotics, automotive, and other 3D sensing applications.

Driven by demand for AI chips, SK hynix revealed it has already booked its entire production of high-bandwidth memory chips for 2024 and is nearly sold out of its production capacity for 2025, reported the Korea Times, while SEMI reported that silicon wafer shipments declined in Q1 2024, quarter over quarter, a 13% drop, attributed to continued weakness in IC fab utilization and inventory adjustments.

PCI-SIG published the CopprLink Internal and External Cable specifications to provide PCIe 5.0 and 6.0 signaling at 32 and 64 GT/s and leverage standard connector form factors for applications including storage, data centers, AI/ML, and disaggregated memory.

The U.S. Department of Commerce (DoC) launched the CHIPS Women in Construction Framework to boost the participation of women and economically disadvantaged people in the workforce, aiming to support on-time and successful completion of CHIPS Act-funded projects. Intel and Micron adopted the framework.

Quick links to more news:

Market Reports
Global
In-Depth
Education and Training
Security
Product News
Quantum
Research
Events
Further Reading


Markets and Money

The SiC wafer processing equipment market is growing rapidly, reports Yole. SiC devices will exceed $10B by 2029 at a CAGR of 25%, and the SiC manufacturing tool market is projected to reach $5B by 2026.

imec.xpand launched a €300 million (~$321 million) fund that will invest in semiconductor and nanotechnology startups with the potential to push semiconductor innovation beyond traditional applications and drive next-gen technologies.

Blaize raised $106 million for its programmable graph streaming processor architecture suite and low-code/no-code software platform for edge AI.

Guerrilla RF completed the acquisition of Gallium Semiconductor‘s portfolio of GaN power amplifiers and front-end modules.

About 90% of connected cars sold in 2030 will have embedded 5G capability, reported Counterpoint. Also, about 75% of laptop PCs sold in 2027 will be AI laptop PCs with advanced generative AI, and the global high-level OS (HLOS) or advanced smartwatch market is predicted to grow 15% in 2024.


Global

Powerchip Semiconductor opened a new 300mm facility in northwestern Taiwan targeting the production of AI semiconductors. The facility is expected to produce 50,000 wafers per month at 55, 40, and 28nm nodes.

Taiwan-based KYEC Semiconductor will withdraw its China operations by the third quarter due to increasing geopolitical tensions, reports the South China Morning Post.

Japan will expand its semiconductor export restrictions to China related to four technologies: Scanning electron microscopes, CMOS, FD-SOI, and the outputs of quantum computers, according to TrendForce.

IBM will invest CAD$187 million (~US$137M in Canada’s semiconductor industry, with the bulk of the investment focused on advanced assembly, testing, and packaging operations.

Microsoft will invest US$2.2 billion over the next four years to build Malaysia’s digital infrastructure, create AI skilling opportunities, establish an AI Center of Excellence, and enhance cybersecurity.


In-Depth

New stories and tech talks published by Semiconductor Engineering this week:


Security

Infineon collaborated with ETAS to integrate the ESCRYPT CycurHSM 3.x automotive security software stack into its next-gen AURIX MCUs to optimize security, performance, and functionality.

Synopsys released Polaris Assist, an AI-powered application security assistant on its Polaris Software Integrity Platform, combining LLM technology with application security knowledge and intelligence.

In security research:

U.S. President Biden signed a National Security Memorandum to enhance the resilience of critical infrastructure, and the White House announced key actions taken since Biden’s AI Executive Order, including measures to mitigate risk.

CISA and partners published a fact sheet on pro-Russia hacktivists who seek to compromise industrial control systems and small-scale operational technology systems in North American and European critical infrastructure sectors. CISA issued other alerts including two Microsoft vulnerabilities.


Education and Training

The U.S. National Institute for Innovation and Technology (NIIT) and the Department of Labor (DoL) partnered to celebrate the inaugural Youth Apprenticeship Week on May 5 to 11, highlighting opportunities in critical industries such as semiconductors and advanced manufacturing.

SUNY Poly received an additional $4 million from New York State for its Semiconductor Processing to Packaging Research, Education, and Training Center.

The University of Pennsylvania launched an online Master of Science in Engineering in AI degree.

The American University of Armenia celebrated its 10-year collaboration with Siemens, which provides AUA’s Engineering Research Center with annual research grants.


Product News

Renesas and SEGGER Embedded Studio launched integrated code generator support for its 32-bit RISC-V MCU. 

Rambus introduced a family of DDR5 server Power Management ICs (PMICs), including an extreme current device for high-performance applications.

Fig. 2: Rambus’ server PMIC on DDR5 RDIMM. Source: Rambus

Keysight added capabilities to Inspector, part of the company’s recently acquired device security research and test lab Riscure, that are designed to test the robustness of post-quantum cryptography (PQC) and help device and chip vendors identify and fix hardware vulnerabilities. Keysight also validated new conformance test cases for narrowband IoT non-terrestrial networks standards.

Ansys’ RedHawk-SC and Totem power integrity platforms were certified for TSMC‘s N2 nanosheet-based process technology, while its RaptorX solution for on-chip electromagnetic modeling was certified for TSMC’s N5 process.

Netherlands-based athleisure brand PREMIUM INC selected CLEVR to implement Siemens’ Mendix Digital Lifecycle Management for Fashion & Retail solution.

Micron will begin shipping high-capacity DRAM for AI data centers.

Microchip uncorked radiation-tolerant SoC FPGAs for space applications that uses a real-time Linux-capable RISC-V-based microprocessor subsystem.


Quantum

University of Chicago researchers developed a system to boost the efficiency of quantum error correction using a framework based on quantum low-density party-check (qLDPC) codes and new hardware involving reconfigurable atom arrays.

PsiQuantum will receive AUD $940 million (~$620 million) in equity, grants, and loans from the Australian and Queensland governments to deploy a utility-scale quantum computer in the regime of 1 million physical qubits in Brisbane, Australia.

Japan-based RIKEN will co-locate IBM’s Quantum System Two with its Fugaku supercomputer for integrated quantum-classical workflows in a heterogeneous quantum-HPC hybrid computing environment. Fugaku is currently one of the world’s most powerful supercomputers.

QuEra Computing was awarded a ¥6.5 billion (~$41 million) contract by Japan’s National Institute of Advanced Industrial Science and Technology (AIST) to deliver a gate-based neutral-atom quantum computer alongside AIST’s ABCI-Q supercomputer as part of a quantum-classical computing platform.

Novo Holdings, the controlling stakeholder of pharmaceutical company Novo Nordisk, plans to boost the quantum technology startup ecosystem in Denmark with DKK 1.4 billion (~$201 million) in investments.

The University of Sydney received AUD $18.4 million (~$12 million) from the Australian government to help grow the quantum industry and ecosystem.

The European Commission plans to spend €112 million (~$120 million) to support AI and quantum research and innovation.


Research

Intel researchers developed a 300-millimeter cryogenic probing process to collect high-volume data on the performance of silicon spin qubit devices across whole wafers using CMOS manufacturing techniques.

EPFL researchers used a form of ML called deep reinforcement learning (DRL) to train a four-legged robot to avoid falls by switching between walking, trotting, and pronking.=

The University of Cambridge researchers developed tiny, flexible nerve cuff devices that can wrap around individual nerve fibers without damaging them, useful to treat a range of neurological disorders.

Argonne National Laboratory and Toyota are exploring a direct recycling approach that carefully extracts components from spent batteries. Argonne is also working with Talon Metals on a process that could increase the number of EV batteries produced from mined nickel ore.


Events

Find upcoming chip industry events here, including:

Event Date Location
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) May 6 – 9 Washington DC
MRS Spring Meeting & Exhibit May 7 – 9 Virtual
ASMC: Advanced Semiconductor Manufacturing Conference May 13 – 16 Albany, NY
ISES Taiwan 2024: International Semiconductor Executive Summit May 14 – 15 New Taipei City
Ansys Simulation World 2024 May 14 – 16 Online
NI Connect Austin 2024 May 20 – 22 Austin, Texas
ITF World 2024 (imec) May 21 – 22 Antwerp, Belgium
Embedded Vision Summit May 21 – 23 Santa Clara, CA
ASIP Virtual Seminar 2024 May 22 Online
Electronic Components and Technology Conference (ECTC) 2024 May 28 – 31 Denver, Colorado
Hardwear.io Security Trainings and Conference USA 2024 May 28 – Jun 1 Santa Clara, CA
Find All Upcoming Events Here

Upcoming webinars are here.


Further Reading

Read the latest special reports and top stories, or check out the latest newsletters:

Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Automotive, Security and Pervasive Computing

The post Chip Industry Week In Review appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Distributing RTL Simulation Across Thousands Of Cores On 4 IPU Sockets (EPFL)Technical Paper Link
    A technical paper titled “Parendi: Thousand-Way Parallel RTL Simulation” was published by researchers at EPFL. Abstract: “Hardware development relies on simulations, particularly cycle-accurate RTL (Register Transfer Level) simulations, which consume significant time. As single-processor performance grows only slowly, conventional, single-threaded RTL simulation is becoming less practical for increasingly complex chips and systems. A solution is parallel RTL simulation, where ideally, simulators
     

Distributing RTL Simulation Across Thousands Of Cores On 4 IPU Sockets (EPFL)

A technical paper titled “Parendi: Thousand-Way Parallel RTL Simulation” was published by researchers at EPFL.

Abstract:

“Hardware development relies on simulations, particularly cycle-accurate RTL (Register Transfer Level) simulations, which consume significant time. As single-processor performance grows only slowly, conventional, single-threaded RTL simulation is becoming less practical for increasingly complex chips and systems. A solution is parallel RTL simulation, where ideally, simulators could run on thousands of parallel cores. However, existing simulators can only exploit tens of cores.
This paper studies the challenges inherent in running parallel RTL simulation on a multi-thousand-core machine (the Graphcore IPU, a 1472-core machine). Simulation performance requires balancing three factors: synchronization, communication, and computation. We experimentally evaluate each metric and analyze how it affects parallel simulation speed, drawing on contrasts between the large-scale IPU and smaller but faster x86 systems.
Using this analysis, we build Parendi, an RTL simulator for the IPU. It distributes RTL simulation across 5888 cores on 4 IPU sockets. Parendi runs large RTL designs up to 4x faster than a powerful, state-of-the-art x86 multicore system.”

Find the technical paper here. Published March 2024 (preprint).

Emami, Mahyar, Thomas Bourgeat, and James Larus. “Parendi: Thousand-Way Parallel RTL Simulation.” arXiv preprint arXiv:2403.04714 (2024).

Related Reading
Anatomy Of A System Simulation
Balancing the benefits of a model with the costs associated with that model is tough, but it becomes even trickier when dissimilar models are combined.

The post Distributing RTL Simulation Across Thousands Of Cores On 4 IPU Sockets (EPFL) appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Voltage Reference Architectures For Harsh Environments: Quantum Computing And SpaceTechnical Paper Link
    A technical paper titled “Cryo-CMOS Voltage References for the Ultrawide Temperature Range From 300 K Down to 4.2 K” was published by researchers at Delft University of Technology, QuTech, Kavli Institute of Nanoscience Delft, and École Polytechnique Fédérale de Lausanne (EPFL). Abstract: “This article presents a family of sub-1-V, fully-CMOS voltage references adopting MOS devices in weak inversion to achieve continuous operation from room temperature (RT) down to cryogenic temperatures. Their
     

Voltage Reference Architectures For Harsh Environments: Quantum Computing And Space

A technical paper titled “Cryo-CMOS Voltage References for the Ultrawide Temperature Range From 300 K Down to 4.2 K” was published by researchers at Delft University of Technology, QuTech, Kavli Institute of Nanoscience Delft, and École Polytechnique Fédérale de Lausanne (EPFL).

Abstract:

“This article presents a family of sub-1-V, fully-CMOS voltage references adopting MOS devices in weak inversion to achieve continuous operation from room temperature (RT) down to cryogenic temperatures. Their accuracy limitations due to curvature, body effect, and mismatch are investigated and experimentally validated. Implemented in 40-nm CMOS, the references show a line regulation better than 2.7%/V from a supply as low as 0.99 V. By applying dynamic element matching (DEM) techniques, a spread of 1.2% (3 σ ) from 4.2 to 300 K can be achieved, resulting in a temperature coefficient (TC) of 111 ppm/K. As the first significant statistical characterization extending down to cryogenic temperatures, the results demonstrate the ability of the proposed architectures to work under cryogenic harsh environments, such as space-and quantum-computing applications.”

Find the technical paper here. Published April 2024.

J. van Staveren et al., “Cryo-CMOS Voltage References for the Ultrawide Temperature Range From 300 K Down to 4.2 K,” in IEEE Journal of Solid-State Circuits, doi: 10.1109/JSSC.2024.3378768.

Further Reading
The Race Toward Quantum Advantage
Enormous amounts of money have been invested into quantum computing, but so far it has not surpassed conventional computers. When will that change?
Managing P/P Tradeoffs With Voltage Droop Gets Trickier
Higher current densities set against lower power envelopes makes meeting specs more challenging, especially at advanced nodes.

The post Voltage Reference Architectures For Harsh Environments: Quantum Computing And Space appeared first on Semiconductor Engineering.

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