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  • ✇Semiconductor Engineering
  • Demonstrating Programmable Nonlinear Quantum Photonic ICsTechnical Paper Link
    A technical paper titled “Programmable Nonlinear Quantum Photonic Circuits” was published by researchers at Niels Bohr Institute, University of Copenhagen, University of Bristol, and Ruhr-Universitat Bochum. Abstract: “The lack of interactions between single photons prohibits direct nonlinear operations in quantum optical circuits, representing a central obstacle in photonic quantum technologies. Here, we demonstrate multi-mode nonlinear photonic circuits where both linear and direct nonlinear o
     

Demonstrating Programmable Nonlinear Quantum Photonic ICs

20. Červen 2024 v 20:31

A technical paper titled “Programmable Nonlinear Quantum Photonic Circuits” was published by researchers at Niels Bohr Institute, University of Copenhagen, University of Bristol, and Ruhr-Universitat Bochum.

Abstract:

“The lack of interactions between single photons prohibits direct nonlinear operations in quantum optical circuits, representing a central obstacle in photonic quantum technologies. Here, we demonstrate multi-mode nonlinear photonic circuits where both linear and direct nonlinear operations can be programmed with high precision at the single-photon level. Deterministic nonlinear interaction is realized with a tunable quantum dot embedded in a nanophotonic waveguide mediating interactions between individual photons within a temporal linear optical interferometer. We demonstrate the capability to reprogram the nonlinear photonic circuits and implement protocols where strong nonlinearities are required, in particular for quantum simulation of anharmonic molecular dynamics, thereby showcasing the new key functionalities enabled by our technology.”

Find the technical paper here. Published May 2024 (preprint).

Nielsen, Kasper H., Ying Wang, Edward Deacon, Patrik I. Sund, Zhe Liu, Sven Scholz, Andreas D. Wieck et al. “Programmable Nonlinear Quantum Photonic Circuits.” arXiv preprint arXiv:2405.17941 (2024).

Related Reading
The Race Toward Quantum Advantage
Enormous amounts of money have been invested into quantum computing, but so far it has not surpassed conventional computers. When will that change?
Photonics: The Former And Future Solution
Twenty-five years ago, photonics was supposed to be the future of high technology. Has that future finally arrived?

The post Demonstrating Programmable Nonlinear Quantum Photonic ICs appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Characterizing and Evaluating A Quantum Processor Unit In A HPC CenterTechnical Paper Link
    A new technical paper titled “Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center” was published by researchers at Leibniz Supercomputing Centre, IQM Quantum Computers, and Technical University of Munich. Abstract “As quantum computers mature, they migrate from laboratory environments to HPC centers. This movement enables large-scale deployments, greater access to the technology, and deep integration into HPC in the form of quantum acceleration. In labo
     

Characterizing and Evaluating A Quantum Processor Unit In A HPC Center

11. Červen 2024 v 04:36

A new technical paper titled “Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center” was published by researchers at Leibniz Supercomputing Centre, IQM Quantum Computers, and Technical University of Munich.

Abstract

“As quantum computers mature, they migrate from laboratory environments to HPC centers. This movement enables large-scale deployments, greater access to the technology, and deep integration into HPC in the form of quantum acceleration. In laboratory environments, specialists directly control the systems’ environments and operations at any time with hands-on access, while HPC centers require remote and autonomous operations with minimal physical contact. The requirement for automation of the calibration process needed by all current quantum systems relies on maximizing their coherence times and fidelities and, with that, their best performance. It is, therefore, of great significance to establish a standardized and automatic calibration process alongside unified evaluation standards for quantum computing performance to evaluate the success of the calibration and operation of the system. In this work, we characterize our in-house superconducting quantum computer, establish an automatic calibration process, and evaluate its performance through quantum volume and an application-specific algorithm. We also analyze readout errors and improve the readout fidelity, leaning on error mitigation.”

Find the technical paper here. Published May 2024.

X. Deng, S. Pogorzalek, F. Vigneau, P. Yang, M. Schulz and L. Schulz, “Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center,” ISC High Performance 2024 Research Paper Proceedings (39th International Conference), Hamburg, Germany, 2024, pp. 1-9, doi: 10.23919/ISC.2024.10528924.

The post Characterizing and Evaluating A Quantum Processor Unit In A HPC Center appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Chip Industry Week In ReviewThe SE Staff
    Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry’s gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC process for chips used in smartphones and other 5G/6G mobile devices. The process uses wafer-to-wafer bond
     

Chip Industry Week In Review

3. Květen 2024 v 09:01

Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry’s gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea.

UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC process for chips used in smartphones and other 5G/6G mobile devices. The process uses wafer-to-wafer bonding technology to address radio frequency interference between stacked dies and reduces die size by 45%.

Fig. 1: UMC’s 3D IC solution for RFSOI technology. Source: UMC

The first programmable chip capable of shaping, splitting, and steering beams of light is now being produced by Skywater Technology and Lumotive. The technology is critical for advancing lidar-based systems used in robotics, automotive, and other 3D sensing applications.

Driven by demand for AI chips, SK hynix revealed it has already booked its entire production of high-bandwidth memory chips for 2024 and is nearly sold out of its production capacity for 2025, reported the Korea Times, while SEMI reported that silicon wafer shipments declined in Q1 2024, quarter over quarter, a 13% drop, attributed to continued weakness in IC fab utilization and inventory adjustments.

PCI-SIG published the CopprLink Internal and External Cable specifications to provide PCIe 5.0 and 6.0 signaling at 32 and 64 GT/s and leverage standard connector form factors for applications including storage, data centers, AI/ML, and disaggregated memory.

The U.S. Department of Commerce (DoC) launched the CHIPS Women in Construction Framework to boost the participation of women and economically disadvantaged people in the workforce, aiming to support on-time and successful completion of CHIPS Act-funded projects. Intel and Micron adopted the framework.

Quick links to more news:

Market Reports
Global
In-Depth
Education and Training
Security
Product News
Quantum
Research
Events
Further Reading


Markets and Money

The SiC wafer processing equipment market is growing rapidly, reports Yole. SiC devices will exceed $10B by 2029 at a CAGR of 25%, and the SiC manufacturing tool market is projected to reach $5B by 2026.

imec.xpand launched a €300 million (~$321 million) fund that will invest in semiconductor and nanotechnology startups with the potential to push semiconductor innovation beyond traditional applications and drive next-gen technologies.

Blaize raised $106 million for its programmable graph streaming processor architecture suite and low-code/no-code software platform for edge AI.

Guerrilla RF completed the acquisition of Gallium Semiconductor‘s portfolio of GaN power amplifiers and front-end modules.

About 90% of connected cars sold in 2030 will have embedded 5G capability, reported Counterpoint. Also, about 75% of laptop PCs sold in 2027 will be AI laptop PCs with advanced generative AI, and the global high-level OS (HLOS) or advanced smartwatch market is predicted to grow 15% in 2024.


Global

Powerchip Semiconductor opened a new 300mm facility in northwestern Taiwan targeting the production of AI semiconductors. The facility is expected to produce 50,000 wafers per month at 55, 40, and 28nm nodes.

Taiwan-based KYEC Semiconductor will withdraw its China operations by the third quarter due to increasing geopolitical tensions, reports the South China Morning Post.

Japan will expand its semiconductor export restrictions to China related to four technologies: Scanning electron microscopes, CMOS, FD-SOI, and the outputs of quantum computers, according to TrendForce.

IBM will invest CAD$187 million (~US$137M in Canada’s semiconductor industry, with the bulk of the investment focused on advanced assembly, testing, and packaging operations.

Microsoft will invest US$2.2 billion over the next four years to build Malaysia’s digital infrastructure, create AI skilling opportunities, establish an AI Center of Excellence, and enhance cybersecurity.


In-Depth

New stories and tech talks published by Semiconductor Engineering this week:


Security

Infineon collaborated with ETAS to integrate the ESCRYPT CycurHSM 3.x automotive security software stack into its next-gen AURIX MCUs to optimize security, performance, and functionality.

Synopsys released Polaris Assist, an AI-powered application security assistant on its Polaris Software Integrity Platform, combining LLM technology with application security knowledge and intelligence.

In security research:

U.S. President Biden signed a National Security Memorandum to enhance the resilience of critical infrastructure, and the White House announced key actions taken since Biden’s AI Executive Order, including measures to mitigate risk.

CISA and partners published a fact sheet on pro-Russia hacktivists who seek to compromise industrial control systems and small-scale operational technology systems in North American and European critical infrastructure sectors. CISA issued other alerts including two Microsoft vulnerabilities.


Education and Training

The U.S. National Institute for Innovation and Technology (NIIT) and the Department of Labor (DoL) partnered to celebrate the inaugural Youth Apprenticeship Week on May 5 to 11, highlighting opportunities in critical industries such as semiconductors and advanced manufacturing.

SUNY Poly received an additional $4 million from New York State for its Semiconductor Processing to Packaging Research, Education, and Training Center.

The University of Pennsylvania launched an online Master of Science in Engineering in AI degree.

The American University of Armenia celebrated its 10-year collaboration with Siemens, which provides AUA’s Engineering Research Center with annual research grants.


Product News

Renesas and SEGGER Embedded Studio launched integrated code generator support for its 32-bit RISC-V MCU. 

Rambus introduced a family of DDR5 server Power Management ICs (PMICs), including an extreme current device for high-performance applications.

Fig. 2: Rambus’ server PMIC on DDR5 RDIMM. Source: Rambus

Keysight added capabilities to Inspector, part of the company’s recently acquired device security research and test lab Riscure, that are designed to test the robustness of post-quantum cryptography (PQC) and help device and chip vendors identify and fix hardware vulnerabilities. Keysight also validated new conformance test cases for narrowband IoT non-terrestrial networks standards.

Ansys’ RedHawk-SC and Totem power integrity platforms were certified for TSMC‘s N2 nanosheet-based process technology, while its RaptorX solution for on-chip electromagnetic modeling was certified for TSMC’s N5 process.

Netherlands-based athleisure brand PREMIUM INC selected CLEVR to implement Siemens’ Mendix Digital Lifecycle Management for Fashion & Retail solution.

Micron will begin shipping high-capacity DRAM for AI data centers.

Microchip uncorked radiation-tolerant SoC FPGAs for space applications that uses a real-time Linux-capable RISC-V-based microprocessor subsystem.


Quantum

University of Chicago researchers developed a system to boost the efficiency of quantum error correction using a framework based on quantum low-density party-check (qLDPC) codes and new hardware involving reconfigurable atom arrays.

PsiQuantum will receive AUD $940 million (~$620 million) in equity, grants, and loans from the Australian and Queensland governments to deploy a utility-scale quantum computer in the regime of 1 million physical qubits in Brisbane, Australia.

Japan-based RIKEN will co-locate IBM’s Quantum System Two with its Fugaku supercomputer for integrated quantum-classical workflows in a heterogeneous quantum-HPC hybrid computing environment. Fugaku is currently one of the world’s most powerful supercomputers.

QuEra Computing was awarded a ¥6.5 billion (~$41 million) contract by Japan’s National Institute of Advanced Industrial Science and Technology (AIST) to deliver a gate-based neutral-atom quantum computer alongside AIST’s ABCI-Q supercomputer as part of a quantum-classical computing platform.

Novo Holdings, the controlling stakeholder of pharmaceutical company Novo Nordisk, plans to boost the quantum technology startup ecosystem in Denmark with DKK 1.4 billion (~$201 million) in investments.

The University of Sydney received AUD $18.4 million (~$12 million) from the Australian government to help grow the quantum industry and ecosystem.

The European Commission plans to spend €112 million (~$120 million) to support AI and quantum research and innovation.


Research

Intel researchers developed a 300-millimeter cryogenic probing process to collect high-volume data on the performance of silicon spin qubit devices across whole wafers using CMOS manufacturing techniques.

EPFL researchers used a form of ML called deep reinforcement learning (DRL) to train a four-legged robot to avoid falls by switching between walking, trotting, and pronking.=

The University of Cambridge researchers developed tiny, flexible nerve cuff devices that can wrap around individual nerve fibers without damaging them, useful to treat a range of neurological disorders.

Argonne National Laboratory and Toyota are exploring a direct recycling approach that carefully extracts components from spent batteries. Argonne is also working with Talon Metals on a process that could increase the number of EV batteries produced from mined nickel ore.


Events

Find upcoming chip industry events here, including:

Event Date Location
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) May 6 – 9 Washington DC
MRS Spring Meeting & Exhibit May 7 – 9 Virtual
ASMC: Advanced Semiconductor Manufacturing Conference May 13 – 16 Albany, NY
ISES Taiwan 2024: International Semiconductor Executive Summit May 14 – 15 New Taipei City
Ansys Simulation World 2024 May 14 – 16 Online
NI Connect Austin 2024 May 20 – 22 Austin, Texas
ITF World 2024 (imec) May 21 – 22 Antwerp, Belgium
Embedded Vision Summit May 21 – 23 Santa Clara, CA
ASIP Virtual Seminar 2024 May 22 Online
Electronic Components and Technology Conference (ECTC) 2024 May 28 – 31 Denver, Colorado
Hardwear.io Security Trainings and Conference USA 2024 May 28 – Jun 1 Santa Clara, CA
Find All Upcoming Events Here

Upcoming webinars are here.


Further Reading

Read the latest special reports and top stories, or check out the latest newsletters:

Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Automotive, Security and Pervasive Computing

The post Chip Industry Week In Review appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Chip Industry Week In ReviewThe SE Staff
    SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at the base of the HBM stack. Intel assembled the industry’s first high-NA EUV lithography system. “Compared
     

Chip Industry Week In Review

19. Duben 2024 v 09:01

SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at the base of the HBM stack.

Intel assembled the industry’s first high-NA EUV lithography system. “Compared to 0.33NA EUV, high-NA EUV (or 0.55NA EUV) can deliver higher imaging contrast for similar features, which enables less light per exposure, thereby reducing the time required to print each layer and increasing wafer output,” Intel said.


Fig. 1: Bigger iron — Intel’s brand new high-NA EUV machinery. Source: Intel

Samsung is slated to receive $6.4 billion in CHIPS ACT funding from the U.S. Department of Commerce (DoC) as part of a $40 billion expansion of its Austin, Texas, manufacturing facility, along with an R&D fab, a pair of leading-edge logic fabs, and an advanced packaging plant in nearby Taylor, Texas.

Micron and the U.S. government next week will announce $6.1 billion in CHIPS Act funding for the development of advanced memory chips in New York and Idaho, according to AP News.

Cadence unveiled its Palladium Z3 Emulation and Protium X3 FPGA Prototyping systems, targeted at multi-billion-gate designs with 2X increase in capacity and a 1.5X performance increase compared to previous-generation systems. Cadence also teamed up with MemVerge to enable seamless support for AWS Spot instances for long-running high-memory EDA jobs, and extended its hybrid cloud environment solutions through a collaboration with NetApp.


Fig. 2: At CadenceLive Silicon Valley, NVIDIA CEO Jensen Huang (r.) discussed accelerated computing and generative AI with Cadence CEO Anirudh Devgan. Source: Semiconductor Engineering


Quick links to more news:

Global
Markets and Money
In-Depth
Security
Education and Workforce
Product and Standards
Research
Quantum
Events
Further Reading


Global

After Taiwan’s recent 7.2 magnitude earthquake, TSMC reached more the 70% tool recovery in its fabs within the first 10 hours and full recovery by the end of the third day, according to this week’s earnings call. Some wafers in process were scrapped but the company expects the lost production to be recovered in the second quarter.  Also in the call, TSMC said they expect their “customers to share some of the higher cost” of the overseas fabs and higher electricity costs.

Advantest‘s regional headquarters in Taiwan donated $2.2 million New Taiwan dollars ($680,000 US) for aid to victims and reconstruction efforts related to the Taiwan earthquake that struck on April 3.

Japan’s exports grew by more than 7% YoY in March, driven by an 11.3% increase in shipments of electronics and semiconductor manufacturing equipment, much of it to China, according to NikkeiAsia.

China‘s IC output grew 40% in the first quarter, primarily driven by EVs and smartphones, according to the South China Morning Post.

In the U.S., the Biden Administration released a notice of funding opportunity of $50 million targeted at small businesses pursuing advances in metrology research and technology. Also, the U.S. Department of Energy announced a $33 million funding opportunity for smart manufacturing technologies.

Germany‘s Fraunhofer IIS launched its On-Board Processor (FOBP) for the German Space Agency’s Heinrich Hertz communication satellite. FOBP can be controlled and reprogrammed from Earth and will be used to investigate creation of hybrid communication networks.


Markets and Money

RISC-V startup Rivos raised more than $250 million in capital investments to tape out its first power-optimized chips for data analytics and generative AI applications.

Silvaco filed to go public on Nasdaq. The company also received a $5 million convertible note investment from Microchip.

Microchip acquired Neuronix AI Labs to provide AI-enabled FPGA solutions for large-scale, high-performance edge applications.

The advanced packaging market saw a modest 4% increase in revenues in Q4 2023 versus the previous quarter, with a projected decline of 13% QoQ in the first quarter of 2024, reports Yole. Overall, the market is expected to increase from $38 billion in 2023 to $69.5 billion in 2029 with a CAGR of 10.7%.

TSMC’s CoWoS total capacity will increase by 150% in 2024 due to demand for NVIDIA’s Blackwell Platform, reports TrendForce.

ASML saw a nearly 40% drop in new litho equipment sales QoQ in Q1 2024 and a 61% drop in net bookings as manufacturers reduced investments in new capital equipment during the recent semiconductor market slump.

Global PC shipments rose about 3% YoY in Q1 2024, and that same growth is expected for full year 2024, reports Counterpoint. Manufacturers are predicted to promote AI PCs as semiconductor companies prepare to launch SoCs featuring higher TOPS.

The GenAI smartphone market share is predicted to reach 11% by 2024 and 43% by 2027, reports Counterpoint. Samsung likely will lead in 2024, but Apple may overtake it in 2025.

The RF GaN market is expected to exceed $2 billion by 2029, fueled by the defense and telecom infrastructure sectors, reports Yole.


In-Depth

Semiconductor Engineering published its Manufacturing, Packaging & Materials newsletter this week. Top articles include:

Plus, check out these new stories and tech talks:


Security

In security research:

  • Seoul National University, Sandia National Laboratories, Texas A&M University, and Applied Materials demonstrated a memristor crossbar architecture for encryption and decryption.
  • Robert Bosch, Forschungszentrum Julich, and Newcastle University investigated techniques for error detection and correction in in-memory computing.
  • The University of Florida introduced an automated framework that can help identify security assets for a design at the register-transfer level (RTL).

DARPA conducted successful in-air tests of AI flying an F-16 autonomously versus a human-piloted F-16 in visual-range combat scenarios.

The National Security Agency’s Artificial Intelligence Security Center (NSA AISC) published joint guidance on deploying AI systems securely with the Cybersecurity and Infrastructure Security Agency (CISA), the Federal Bureau of Investigation (FBI), and international partners. CISA also issued other alerts.


Products and Standards

Samsung uncorked LPDDR5X DRAM built on a 12nm process that supports up to 10.7 Gbps and expands the single package capacity of mobile DRAM up to 32 GB.

Keysight revealed its next-generation RF circuit simulation tool that supports multi-physics co-design of circuit, electromagnetic, and electrothermal simulations across Cadence, Synopsys, and Keysight platforms.

Renesas released its FemtoClock family of ultra-low jitter clock generators and jitter attenuators with 8 and 12 outputs, enabling clock tree designs for high-speed interconnect systems in telecom and data center switches, routers, medical imaging, and more.

Movellus expanded its droop response solutions with Aeonic Generate AWM3, which responds to voltage droops within 1 to 2 clock cycles while providing enhanced observability for droop profiling and enabling fine-grained dynamic frequency scaling.

Efabless announced the second version of its Python-based open-source EDA software for construction of customizable flows using proprietary or open-source tools.

Faraday Technology licensed Arm’s Cortex-A720AE IP to use in the development of AI-enabled vehicle ASICs. Also, Untether AI teamed up with Arm to enable its inference acceleration technology to be implemented alongside the latest-generation Automotive Enhanced technology from Arm for ADAS and autonomous vehicle applications.

FOXESS used Infineon’s 1,200V CoolSiC MOSFETs and EiceDRIVER gate drivers for industrial energy storage applications, aiming to promote green energy.

Emotors adopted Siemens’ Simcenter solutions for NVH testing of next-gen automotive e-drives.

SiTime debuted a family of clock generators for AI datacenter applications with clock, oscillator, and resonator in an integrated chip.

JEDEC published the JESD79-5C DDR5 SDRAM standard, which includes a DRAM data integrity improvement called Per-Row Activation Counting (PRAC) that precisely counts DRAM activations on a wordline granularity and alerts the system to pause traffic and designate time for mitigation measures when an excessive number of activations are detected.

The LoRa Alliance launched its roadmap for the development of the LoRaWAN open standard for IoT communications, referring to long-range radio (LoRa) low-power wide-area networks (LPWANs).


Education and Workforce

Texas A&M introduced a new Master of Science program for microelectronics and semiconductors, which will begin in fall 2025.

The Cornell NanoScale Science and Technology Facility (CNF) is partnering with Tompkins Cortland Community College and Penn State to offer a free Microelectronics and Nanomanufacturing Certificate Program to veterans and their dependents.

Eindhoven University of Technology (TU/e) has more than 700 researchers and 25 research group focused on the chip industry, but the number is projected to grow significantly due to the Dutch government’s recent investment.


Research

Intel announced a large-scale neuromorphic system based on its Loihi 2 processor. Initially deployed at Sandia National Laboratories, it aims to support research for future brain-inspired AI. Intel is also collaborating with Seekr on next-gen LLM and foundation models.

Los Alamos National Lab, HPE, and NVIDIA collaborated on the design and installation of Venado, the Lab’s new supercomputer. “Venado adds to our cutting-edge supercomputing that advances national security and basic research, and it will accelerate how we integrate artificial intelligence into meeting those challenges,” said Thom Mason, director of Los Alamos National Laboratory in a release.

Penn State is partnering with Morgan Advanced Materials on a five-year, multi-million-dollar research project to advance silicon carbide (SiC) technology. Morgan will become a founding member of the Penn State Silicon Carbide Innovation Alliance. Also, Coherent secured CHIPS Act funding of $15 million for research into high-voltage, high-power silicon carbide and single-crystal diamond semiconductors.

Oak Ridge National Laboratory (ORNL) researchers found a more efficient way to extract lithium from waste liquids leached from mining sites, oil fields, and used batteries.


Quantum

Quantinuum said it reached an inherent 99.9% 2-qubit gate fidelity in its commercial quantum computer, a point at which quantum error correction protocols can be used to greatly reduce error rates.

D-Wave Quantum uncorked a fast-anneal feature to speed up computations on its quantum processing units, which reduces the impact of external disturbances.

MIT researchers outlined a new conceptual model for a quantum computer that aims to make writing code for them easier.

SLAC National Accelerator Laboratory, Stanford University, Max Planck Institute of Quantum Optics, Ludwig-Maximilians-Universitat Munich, and Instituto de Ciencia de Materiales de Madrid researchers proposed a method that harnesses the structure of light to tweak the properties of quantum materials.


Events

Find upcoming chip industry events here, including:

Event Date Location
IEEE Custom Integrated Circuits Conference (CICC) Apr 21 – 24 Denver, Colorado
MRS Spring Meeting & Exhibit Apr 22 – 26 Seattle, Washington
(note: Virtual held in May)
IEEE VLSI Test Symposium Apr 22 – 24 Tempe, AZ
TSMC North America Symposium Apr 24 Santa Clara, CA
Renesas Tech Day: Scalable AI Solutions for the Edge May 1 Boston
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) May 6 – 9 Washington DC
MRS Spring Meeting & Exhibit May 7 – 9 Virtual
ASMC: Advanced Semiconductor Manufacturing Conference May 13 – 16 Albany, NY
ISES Taiwan 2024: International Semiconductor Executive Summit May 14 – 15 New Taipei City
Ansys Simulation World 2024 May 14 – 16 Online
NI Connect Austin 2024 May 20 – 22 Austin, Texas
ITF World 2024 (imec) May 21 – 22 Antwerp, Belgium
Electronic Components and Technology Conference (ECTC) 2024 May 28 – 31 Denver, Colorado
Hardwear.io Security Trainings and Conference USA 2024 May 28 – Jun 1 Santa Clara, CA
Find A Complete List Of Upcoming Events Here

Upcoming webinars are here.


Further Reading

Read the latest special reports and top stories, or check out the latest newsletters:

Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Automotive, Security and Pervasive Computing

 

The post Chip Industry Week In Review appeared first on Semiconductor Engineering.

  • ✇Semiconductor Engineering
  • Chip Industry Week In ReviewThe SE Staff
    SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at the base of the HBM stack. Intel assembled the industry’s first high-NA EUV lithography system. “Compared
     

Chip Industry Week In Review

19. Duben 2024 v 09:01

SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at the base of the HBM stack.

Intel assembled the industry’s first high-NA EUV lithography system. “Compared to 0.33NA EUV, high-NA EUV (or 0.55NA EUV) can deliver higher imaging contrast for similar features, which enables less light per exposure, thereby reducing the time required to print each layer and increasing wafer output,” Intel said.


Fig. 1: Bigger iron — Intel’s brand new high-NA EUV machinery. Source: Intel

Samsung is slated to receive $6.4 billion in CHIPS ACT funding from the U.S. Department of Commerce (DoC) as part of a $40 billion expansion of its Austin, Texas, manufacturing facility, along with an R&D fab, a pair of leading-edge logic fabs, and an advanced packaging plant in nearby Taylor, Texas.

Micron and the U.S. government next week will announce $6.1 billion in CHIPS Act funding for the development of advanced memory chips in New York and Idaho, according to AP News.

Cadence unveiled its Palladium Z3 Emulation and Protium X3 FPGA Prototyping systems, targeted at multi-billion-gate designs with 2X increase in capacity and a 1.5X performance increase compared to previous-generation systems. Cadence also teamed up with MemVerge to enable seamless support for AWS Spot instances for long-running high-memory EDA jobs, and extended its hybrid cloud environment solutions through a collaboration with NetApp.


Fig. 2: At CadenceLive Silicon Valley, NVIDIA CEO Jensen Huang (r.) discussed accelerated computing and generative AI with Cadence CEO Anirudh Devgan. Source: Semiconductor Engineering


Quick links to more news:

Global
Markets and Money
In-Depth
Security
Education and Workforce
Product and Standards
Research
Quantum
Events
Further Reading


Global

After Taiwan’s recent 7.2 magnitude earthquake, TSMC reached more the 70% tool recovery in its fabs within the first 10 hours and full recovery by the end of the third day, according to this week’s earnings call. Some wafers in process were scrapped but the company expects the lost production to be recovered in the second quarter.  Also in the call, TSMC said they expect their “customers to share some of the higher cost” of the overseas fabs and higher electricity costs.

Advantest‘s regional headquarters in Taiwan donated $2.2 million New Taiwan dollars ($680,000 US) for aid to victims and reconstruction efforts related to the Taiwan earthquake that struck on April 3.

Japan’s exports grew by more than 7% YoY in March, driven by an 11.3% increase in shipments of electronics and semiconductor manufacturing equipment, much of it to China, according to NikkeiAsia.

China‘s IC output grew 40% in the first quarter, primarily driven by EVs and smartphones, according to the South China Morning Post.

In the U.S., the Biden Administration released a notice of funding opportunity of $50 million targeted at small businesses pursuing advances in metrology research and technology. Also, the U.S. Department of Energy announced a $33 million funding opportunity for smart manufacturing technologies.

Germany‘s Fraunhofer IIS launched its On-Board Processor (FOBP) for the German Space Agency’s Heinrich Hertz communication satellite. FOBP can be controlled and reprogrammed from Earth and will be used to investigate creation of hybrid communication networks.


Markets and Money

RISC-V startup Rivos raised more than $250 million in capital investments to tape out its first power-optimized chips for data analytics and generative AI applications.

Silvaco filed to go public on Nasdaq. The company also received a $5 million convertible note investment from Microchip.

Microchip acquired Neuronix AI Labs to provide AI-enabled FPGA solutions for large-scale, high-performance edge applications.

The advanced packaging market saw a modest 4% increase in revenues in Q4 2023 versus the previous quarter, with a projected decline of 13% QoQ in the first quarter of 2024, reports Yole. Overall, the market is expected to increase from $38 billion in 2023 to $69.5 billion in 2029 with a CAGR of 10.7%.

TSMC’s CoWoS total capacity will increase by 150% in 2024 due to demand for NVIDIA’s Blackwell Platform, reports TrendForce.

ASML saw a nearly 40% drop in new litho equipment sales QoQ in Q1 2024 and a 61% drop in net bookings as manufacturers reduced investments in new capital equipment during the recent semiconductor market slump.

Global PC shipments rose about 3% YoY in Q1 2024, and that same growth is expected for full year 2024, reports Counterpoint. Manufacturers are predicted to promote AI PCs as semiconductor companies prepare to launch SoCs featuring higher TOPS.

The GenAI smartphone market share is predicted to reach 11% by 2024 and 43% by 2027, reports Counterpoint. Samsung likely will lead in 2024, but Apple may overtake it in 2025.

The RF GaN market is expected to exceed $2 billion by 2029, fueled by the defense and telecom infrastructure sectors, reports Yole.


In-Depth

Semiconductor Engineering published its Manufacturing, Packaging & Materials newsletter this week. Top articles include:

Plus, check out these new stories and tech talks:


Security

In security research:

  • Seoul National University, Sandia National Laboratories, Texas A&M University, and Applied Materials demonstrated a memristor crossbar architecture for encryption and decryption.
  • Robert Bosch, Forschungszentrum Julich, and Newcastle University investigated techniques for error detection and correction in in-memory computing.
  • The University of Florida introduced an automated framework that can help identify security assets for a design at the register-transfer level (RTL).

DARPA conducted successful in-air tests of AI flying an F-16 autonomously versus a human-piloted F-16 in visual-range combat scenarios.

The National Security Agency’s Artificial Intelligence Security Center (NSA AISC) published joint guidance on deploying AI systems securely with the Cybersecurity and Infrastructure Security Agency (CISA), the Federal Bureau of Investigation (FBI), and international partners. CISA also issued other alerts.


Products and Standards

Samsung uncorked LPDDR5X DRAM built on a 12nm process that supports up to 10.7 Gbps and expands the single package capacity of mobile DRAM up to 32 GB.

Keysight revealed its next-generation RF circuit simulation tool that supports multi-physics co-design of circuit, electromagnetic, and electrothermal simulations across Cadence, Synopsys, and Keysight platforms.

Renesas released its FemtoClock family of ultra-low jitter clock generators and jitter attenuators with 8 and 12 outputs, enabling clock tree designs for high-speed interconnect systems in telecom and data center switches, routers, medical imaging, and more.

Movellus expanded its droop response solutions with Aeonic Generate AWM3, which responds to voltage droops within 1 to 2 clock cycles while providing enhanced observability for droop profiling and enabling fine-grained dynamic frequency scaling.

Efabless announced the second version of its Python-based open-source EDA software for construction of customizable flows using proprietary or open-source tools.

Faraday Technology licensed Arm’s Cortex-A720AE IP to use in the development of AI-enabled vehicle ASICs. Also, Untether AI teamed up with Arm to enable its inference acceleration technology to be implemented alongside the latest-generation Automotive Enhanced technology from Arm for ADAS and autonomous vehicle applications.

FOXESS used Infineon’s 1,200V CoolSiC MOSFETs and EiceDRIVER gate drivers for industrial energy storage applications, aiming to promote green energy.

Emotors adopted Siemens’ Simcenter solutions for NVH testing of next-gen automotive e-drives.

SiTime debuted a family of clock generators for AI datacenter applications with clock, oscillator, and resonator in an integrated chip.

JEDEC published the JESD79-5C DDR5 SDRAM standard, which includes a DRAM data integrity improvement called Per-Row Activation Counting (PRAC) that precisely counts DRAM activations on a wordline granularity and alerts the system to pause traffic and designate time for mitigation measures when an excessive number of activations are detected.

The LoRa Alliance launched its roadmap for the development of the LoRaWAN open standard for IoT communications, referring to long-range radio (LoRa) low-power wide-area networks (LPWANs).


Education and Workforce

Texas A&M introduced a new Master of Science program for microelectronics and semiconductors, which will begin in fall 2025.

The Cornell NanoScale Science and Technology Facility (CNF) is partnering with Tompkins Cortland Community College and Penn State to offer a free Microelectronics and Nanomanufacturing Certificate Program to veterans and their dependents.

Eindhoven University of Technology (TU/e) has more than 700 researchers and 25 research group focused on the chip industry, but the number is projected to grow significantly due to the Dutch government’s recent investment.


Research

Intel announced a large-scale neuromorphic system based on its Loihi 2 processor. Initially deployed at Sandia National Laboratories, it aims to support research for future brain-inspired AI. Intel is also collaborating with Seekr on next-gen LLM and foundation models.

Los Alamos National Lab, HPE, and NVIDIA collaborated on the design and installation of Venado, the Lab’s new supercomputer. “Venado adds to our cutting-edge supercomputing that advances national security and basic research, and it will accelerate how we integrate artificial intelligence into meeting those challenges,” said Thom Mason, director of Los Alamos National Laboratory in a release.

Penn State is partnering with Morgan Advanced Materials on a five-year, multi-million-dollar research project to advance silicon carbide (SiC) technology. Morgan will become a founding member of the Penn State Silicon Carbide Innovation Alliance. Also, Coherent secured CHIPS Act funding of $15 million for research into high-voltage, high-power silicon carbide and single-crystal diamond semiconductors.

Oak Ridge National Laboratory (ORNL) researchers found a more efficient way to extract lithium from waste liquids leached from mining sites, oil fields, and used batteries.


Quantum

Quantinuum said it reached an inherent 99.9% 2-qubit gate fidelity in its commercial quantum computer, a point at which quantum error correction protocols can be used to greatly reduce error rates.

D-Wave Quantum uncorked a fast-anneal feature to speed up computations on its quantum processing units, which reduces the impact of external disturbances.

MIT researchers outlined a new conceptual model for a quantum computer that aims to make writing code for them easier.

SLAC National Accelerator Laboratory, Stanford University, Max Planck Institute of Quantum Optics, Ludwig-Maximilians-Universitat Munich, and Instituto de Ciencia de Materiales de Madrid researchers proposed a method that harnesses the structure of light to tweak the properties of quantum materials.


Events

Find upcoming chip industry events here, including:

Event Date Location
IEEE Custom Integrated Circuits Conference (CICC) Apr 21 – 24 Denver, Colorado
MRS Spring Meeting & Exhibit Apr 22 – 26 Seattle, Washington
(note: Virtual held in May)
IEEE VLSI Test Symposium Apr 22 – 24 Tempe, AZ
TSMC North America Symposium Apr 24 Santa Clara, CA
Renesas Tech Day: Scalable AI Solutions for the Edge May 1 Boston
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) May 6 – 9 Washington DC
MRS Spring Meeting & Exhibit May 7 – 9 Virtual
ASMC: Advanced Semiconductor Manufacturing Conference May 13 – 16 Albany, NY
ISES Taiwan 2024: International Semiconductor Executive Summit May 14 – 15 New Taipei City
Ansys Simulation World 2024 May 14 – 16 Online
NI Connect Austin 2024 May 20 – 22 Austin, Texas
ITF World 2024 (imec) May 21 – 22 Antwerp, Belgium
Electronic Components and Technology Conference (ECTC) 2024 May 28 – 31 Denver, Colorado
Hardwear.io Security Trainings and Conference USA 2024 May 28 – Jun 1 Santa Clara, CA
Find A Complete List Of Upcoming Events Here

Upcoming webinars are here.


Further Reading

Read the latest special reports and top stories, or check out the latest newsletters:

Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Automotive, Security and Pervasive Computing

 

The post Chip Industry Week In Review appeared first on Semiconductor Engineering.

Rapid Exchange Cooling With Trapped Ions For Implementation In A Quantum Charge-Coupled Device

A technical paper titled “Rapid exchange cooling with trapped ions” was published by researchers at Georgia Tech Research Institute.

Abstract:

“The trapped-ion quantum charge-coupled device (QCCD) architecture is a leading candidate for advanced quantum information processing. In current QCCD implementations, imperfect ion transport and anomalous heating can excite ion motion during a calculation. To counteract this, intermediate cooling is necessary to maintain high-fidelity gate performance. Cooling the computational ions sympathetically with ions of another species, a commonly employed strategy, creates a significant runtime bottleneck. Here, we demonstrate a different approach we call exchange cooling. Unlike sympathetic cooling, exchange cooling does not require trapping two different atomic species. The protocol introduces a bank of “coolant” ions which are repeatedly laser cooled. A computational ion can then be cooled by transporting a coolant ion into its proximity. We test this concept experimentally with two 40Ca+ ions, executing the necessary transport in 107 μs, an order of magnitude faster than typical sympathetic cooling durations. We remove over 96%, and as many as 102(5) quanta, of axial motional energy from the computational ion. We verify that re-cooling the coolant ion does not decohere the computational ion. This approach validates the feasibility of a single-species QCCD processor, capable of fast quantum simulation and computation.”

Find the technical paper here. Published February 2024.  A related news release, including a video, can be found here.

Fallek, S.D., Sandhu, V.S., McGill, R.A. et al. Rapid exchange cooling with trapped ions. Nat Commun 15, 1089 (2024). https://doi.org/10.1038/s41467-024-45232-z

Related Reading
The Race Toward Quantum Advantage
Enormous amounts of money have been invested into quantum computing, but so far it has not surpassed conventional computers. When will that change?

The post Rapid Exchange Cooling With Trapped Ions For Implementation In A Quantum Charge-Coupled Device appeared first on Semiconductor Engineering.

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