Gallium nitride is starting to make broader inroads in the lower-end of the high-voltage, wide-bandgap power FET market, where silicon carbide has been the technology of choice. This shift is driven by lower costs and processes that are more compatible with bulk silicon.

Efficiency, power density (size), and cost are the three major concerns in power electronics, and GaN can meet all three criteria. However, to satisfy all of those criteria consistently, the semiconductor ecosystem needs to develop best practices for test, inspection, and metrology, determining what works best for which applications and under varying conditions.

Power ICs play an essential role in stepping up and down voltage levels from one power source to another. GaN is used extensively today in smart phone and laptop adapters, but market opportunities are beginning to widen for this technology. GaN likely will play a significant role in both data centers and automotive applications [1]. Data centers are expanding rapidly due to the focus on AI and a build-out at the edge. And automotive is keen to use GaN power ICs for inverter modules because they will be cheaper than SiC, as well as for onboard battery chargers (OBCs) and various DC-DC conversions from the battery to different applications in the vehicle.

Fig. 1: Current and future fields of interest for GaN and SiC power devices. Source A. Meixner/Semiconductor Engineering

But to enter new markets, GaN device manufactures need to more quickly ramp up new processes and their associated products. Because GaN for power transistors is a developing process technology, measurement data is critical to qualify both the manufacturing process and the reliability of the new semiconductor technology and resulting product.

Much of GaN’s success will depend on metrology and inspection solutions that offer high throughput, as well as non-destructive testing methods such as optical and X-ray. Electron microscopy is useful for drilling down into key device parameters and defect mechanisms. And electrical tests provide complementary data that assists with product/process validation, reliability and qualification, system-level validation, as well as being used for production screening.

Silicon carbide (SiC) remains the material of choice for very high-voltage applications. It offers better performance and higher efficiency than silicon. But SiC is expensive. It requires different equipment than silicon, it’s difficult to grow SiC ingots, and today there is limited wafer capacity.

In contrast, GaN offers some of the same desirable characteristics as SiC and can operate at even higher switching speeds. GaN wafer production is cheaper because it can be created on a silicon substrate utilizing typical silicon processing equipment other than the GaN epitaxial deposition tool. That enables a fab/foundry with a silicon CMOS process to ramp a GaN process with an engineering team experienced in GaN.

The cost comparison isn’t entirely apples-to-apples, of course. The highest-voltage GaN on the market today uses silicon on sapphire (SoS) or other engineered substrates, which are more expensive. But below those voltages, GaN typically has a cost advantage, and that has sparked renewed interest in this technology.

“GaN-based products increase the performance envelopes relative to the incumbent and mature silicon-based technologies,” said Vineet Pancholi, senior director of test technology at Amkor. “Switching speeds with GaN enable the application in ways never possible with silicon. But as the GaN production volumes ramp, these products have extreme economic pressures. The production test list includes static attributes. However, the transient and dynamic attributes are the primary benefit of GaN in the end application.”

Others agree. “The world needs cheaper material, and GaN is easy to build,” said Frank Heidemann, vice president and technology leader of SET at NI/Emerson Test & Measurement. “Gallium nitride has a huge success in the lower voltages ranges — anything up to 500V. This is where the GaN process is very well under control. The problem now is building in higher voltages is a challenge. In the near future there will be products at even higher voltage levels.”

Those higher-voltage applications require new process recipes, new power IC designs, and subsequently product/process validation and qualification.

GaN HEMT properties
Improving the processes needed to create GaN high-electron-mobility transistors (HEMTs) requires a deep understanding of the material properties and the manufacturing consequences of layering these materials.

The underlying physics and structure of wide-bandgap devices significantly differs from silicon high-voltage transistors. Silicon transistors rely on doping of p and n materials. When voltage is applied at the gate, it creates a channel for current to flow from source to drain. In contrast, wide-bandgap transistors are built by layering thin films of different materials, which differ in their bandgap energy. [2] Applying a voltage to the gate enables an electron exchange between the two materials, driving those electrons along the channel between source and drain.

Fig. 2. Cross-sectional animation of e-mode GaN HEMT device. Source: Zeiss Microscopy

“GaN devices rely on two-dimensional electron gas (2DEG) created at the GaN and AlGaN interface to conduct current at high speed,” said Jiangtao Hu, senior director of product marketing at Onto Innovation. “To enable high electron mobility, the epitaxy process creating complex multi-layer crystalline films must be carefully monitored and controlled, ensuring critical film properties such as thickness, composition, and interface roughness are within a tight spec. The ongoing trend of expanding wafer sizes further requires the measurement to be on-product and non-destructive for uniformity control.”

Fig. 3: SEM cross-section of enhancement-mode GaN HEMT built on silicon which requires a superlattice. Source: Zeiss Microscopy

Furthermore, each layer’s electrical properties need to be understood. “It is of utmost importance to determine, as early as possible in the manufacturing process, the electrical characteristics of the structures, the sheet resistance of the 2DEG, the carrier concentration, and the mobility of carriers in the channel, preferably at the wafer level in a non-destructive assessment,” said Christophe Maleville, CTO and senior executive vice president of innovation at Soitec.

Developing process recipes for GaN HEMT devices at higher operating ranges require measurements taken during wafer manufacturing and device testing, both for qualification of a process/product and production manufacturing. Inspection, metrology, and electrical tests focus on process anomalies and defects, which impact the device performance.

“Crystal defects such as dislocations and stacking faults, which can form during deposition and subsequently be grown over and buried, can create long-term reliability concerns even if the devices pass initial testing,” said David Taraci, business development manager of electronics strategic accounts at ZEISS Research Microscopy Solutions. “Gate oxides can pinch off during deposition, creating voids which may not manifest as an issue immediately.”

The quality of the buffer layer is critical because it affects the breakdown voltage. “The maximum breakdown voltage of the devices will be ultimately limited by the breakdown of the buffer layer grown in between the Si substrate and the GaN channel,” said Soitec’s Maleville. “An electrical assessment (IV at high voltage) requires destructive measurements as well as device isolation. This is performed on a sample basis only.”

One way to raise the voltage limit of a GaN device is to add a ‘gate driver’ which keeps it reliable at higher voltages. But to further expand GaN technology’s performance envelope to higher voltage operation engineers need to comprehend a new GaN device reliability properties.

“We are supporting GaN lifetime validation, which is the prediction of a mission characteristic of lifetime for gallium nitride power devices,” said Emerson’s Heidemann. “Engineers build physics-based failure models of these devices. Next, they investigate the acceleration factors. How can we really make tests and verification properly so that we can assess lifetime health?”

The qualification procedures necessitate life-stressing testing, which duplicates predicated mission profile usage, as well as electrical testing, after each life-stress period. That allows engineers to determine shifts in transistor characteristics and outright failures. For example, life stress periods could start with 4,000 hours and increase in 1,000-hour increments to 12,000 hours, during which time the device is turned on/off with specific durations of ‘on’ times.

“Reliability predictions are based upon application mission profiles,” said Stephanie Watts Butler, independent consultant and vice president of industry and standards in the IEEE Power Electronics Society. “In some cases, GaN is going into a new application, or being used differently than silicon, and the mission profile needs to be elucidated. This is one area that the industry is focused upon together.”

As an example of this effort, Butler pointed to JEDEC JEP186 spec [3], which provides guidelines for specifying the breakdown voltage for GaN HEMT devices. “JEDEC and IEC both are issuing guideline documents for methods for test and characterization of wide-bandgap devices, as well as reliability and qualification procedures, and datasheet parameters to enable wide bandgap devices, including GaN, to ramp faster with higher quality in the marketplace,” she said.

Electrical tests remain essential to screening for both time-zero and reliability-associated defects (e.g. infant mortality and reduced lifetime). This holds true for screening wafers, singulated die, and packaged devices. And test content includes tests specific to GaN HEMT power devices performance specifications and tests more directed at defect detection.

Due to inherent device differences, the GaN test list varies in some significant ways from Si and SiC power ICs. Assessing GaN health for qualification and manufacturing purposes requires both static and dynamic tests (SiC DC and AC). A partial list includes zero gate voltage drain leakage current, rise time, fall time, dynamic RDS_on, and dielectric integrity tests.

“These are very time-intensive measurement techniques for GaN devices,” said Tom Tran, product manager for power discrete test products at Teradyne. “On top of the static measurement techniques is the concern about trapped charge — both for functionality and efficiency — revealed through dynamic RDS_on testing.”

Transient tests are necessary for qualification and production purposes due to the high electron mobility, which is what gives GaN HEMT its high switching speed. “From a test standpoint, static test failures indicate basic processing failures, while transient switching failures indicate marginal or process excursions,” said Amkor’s Vineet Pancholi. “Both tests continue to be important to our customers until process maturity is achieved. With the extended range of voltage, current, and switching operations, mainstream test equipment suppliers have been adding complementary instrumentation capabilities.”

And ATE suppliers look to reduce test time, which reduces cost. “Both static and dynamic test requirements drive very high test times,” said Teradyne’s Tran. “But the GaN of today is very different than GaN from a decade ago. We’re able to accelerate this testing just due to the core nature of our ATE architecture. We think there is the possibility further reducing the cost of test for our customers.”

Tools for process control and quality management
GaN HEMT devices’ reliance on thin-film processes highlights the need to understand the material properties and the nature of the interfaces between each layer. That requires tools for process control, yield management, and failure analysis.

“GaN device performance is highly reflective of the film characteristics used in its manufacture,” said Mike McIntyre, director of software product management at Onto Innovation. “The smallest process variations when it comes to film thickness, film stress, line width or even crystalline make-up, can have a dramatic impact on how the device performs, or even if it is usable in its target market. This lack of tolerance to any variation places a greater burden on engineers to understand the factors that correlate to device performance and its profitability.”

Inspection methods that are non-destructive vary in throughput time and in the level of detail provided for engineers to make decisions. While optical methods are fast and provide full wafer coverage, they cannot accurately classify chemical or structural defects for engineers/technicians to review. In contrast, destructive methods provide the information that’s needed to truly understand the nature of the defects. For example, conductive atomic force microscopy (AFM) probing remains slow, but it can identify electrical nature of a defect. And to truly comprehend crystallographic defects and the chemical nature of impurities, engineers can turn to electron microscopy based methods.

One way to assess thin films is with X-rays. “High resolution X-ray measurements are useful to provide production control of the wafer crystalline quality and defects in the buffer, said Soitec’s Maleville. “Minor changes in composition of the buffer, barrier, or capping layer, as well as their layer thickness, can result in significant deviations in device performance. Thickness of the layers, in particular the top cap, barrier, and spacer layers, are typically measured by XRD. However, the throughput of XRD systems is low. Alternatively, ellipsometry offers a reasonably good throughput measurement with more data points for both development and production mode scenarios.”

Optical techniques have been the standard for thin film assessment in the semiconductor industry. Inspection equipment providers have long been on the continuation improvement always evolving journey to improve accuracy, precision and throughput. Providing better metrology tools helps device makers with process control and yield management.

“Recently, we successfully developed a non-destructive on product measurement capability for GaN epi process monitoring,” said Onto’s Hu. “It takes advantage of our advanced optical film experience and our modeling software to simultaneously measure multi-layer epi film thickness, composition, and interface roughness on product wafers.”

Fig. 4: Metrology measurements on GaN for roughness and for Al concentration. Source: Onto Innovation

Assessing the electrical characteristics — 2DEG sheet resistance, channel carrier mobility, and concentration are required for controlling the manufacturing process. A non-destructive assessment would be an improvement over currently used destructive techniques (e.g. SEM). The solutions used for other power ICs do not work for GaN HEMT. As of today, no one has come up with a commercial solution.

Inspection looks for yield impacting defects, as well as defects that affect wafer acceptance in the case of companies that provide engineered substrates.

“Defect inspection for incoming silicon wafers looks for particles, scratches, and other anomalies that might seed imperfections in the subsequent buffer and crystal growth,” said Antonio Mani, business development manager at Thermo Fisher Scientific. “After the growth of the buffer and termination layers, followed by the growth of the doped GaN layers, another set of inspections is carried out. In this case, it is more focused on the detection of cracks, other macroscopic defects (micropipes, carrots), and looking for micro-pits, which are associated to threading dislocations that have survived the buffer layer and are surfacing at the top GaN surface.”

Mani noted that follow-up inspection methods for Si and GaN devices are similar. The difference is the importance in connecting observations back to post-epi results.

More accurate defect libraries would shorten inspection time. “The lack of standardization of surface defect analysis impedes progress,” said Soitec’s Maleville. “Different tools are available on the market, while defect libraries are still being developed essentially by the different user. This lack of globally accepted method and standard defect library for surface defect analysis is slowing down the GaN surface qualification process.”

Whether it involves a manufacturing test failure or a field return, the necessary steps for determining root cause on a problematic packaged part begins with fault isolation. “Given the direct nature of the bandgap of GaN and its operating window in terms of voltage/frequency/power density, classical methods of fault isolation (e.g. optical emission spectroscopy) are forced to focus on different wavelengths and different ranges of excitation of the typical electrical defects,” said Thermo Fisher’s Mani. “Hot carrier pairs are just one example, which highlights the radical difference between GaN and silicon devices.”

In addition to fault isolation there are challenges in creating a device cross-section with focused-ion beam milling methods.

“Several challenges exist in FA for GaN power ICs,” said Zeiss’ Taraci. “In any completed device, in particular, there are numerous materials and layers present for stress mitigation/relaxation and thermal management, depending on whether we are talking enhancement- or depletion-mode devices. Length-scale can be difficult to manage as you are working with these samples, because they have structures of varying dimension present in close proximity. Many of the structures are quite unique to power GaN and can pose challenges themselves in cross-section and analyses. Beam-milling approaches have to be tailored to prevent heavy re-deposition and masking, and are dependent on material, lattice orientation, current, geometry, etc.”

Conclusion
To be successful in bringing new GaN power ICs to new application space engineers and their equipment suppliers need faster process development and a reduction in overall costs. For HEMT devices, it’s understanding the resulting layers and their material properties. This requires a host of metrology, inspection, test, and failure analysis steps to comprehend the issues, and to provide feedback data from experiments and qualifications for process and design improvements.

References

[1] M. Buffolo et al., “Review and Outlook on GaN and SiC Power Devices: Industrial State-of-the-Art, Applications, and Perspectives,” in IEEE Transactions on Electron Devices, March 2024, open access, https://ieeexplore.ieee.org/document/10388225

[2] High electron mobility transistor (HEMT) https://en.wikipedia.org/wiki/High-electron-mobility_transistor

[3] Guideline to specify a transient off-state withstand voltage robustness indicated in datasheets for lateral GaN power conversion devices, JEP186, version 1.0, December 2021. https://www.jedec.org/standards-documents/docs/jep186

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The post Driving Cost Lower and Power Higher With GaN appeared first on Semiconductor Engineering.

Tsunenobu Kimoto, a professor of electronic science and engineering at Kyoto University, literally wrote the book on silicon carbide technology. Fundamentals of Silicon Carbide Technology, published in 2014, covers properties of SiC materials, processing technology, theory, and analysis of practical devices.

Kimoto, whose silicon carbide research has led to better fabrication techniques, improved the quality of wafers and reduced their defects. His innovations, which made silicon carbide semiconductor devices more efficient and more reliable and thus helped make them commercially viable, have had a significant impact on modern technology.

Tsunenobu Kimoto

Employer

Kyoto University

Title

Professor of electronic science and engineering

Member grade

Fellow

Alma mater

Kyoto University

For his contributions to silicon carbide material and power devices, the IEEE Fellow was honored with this year’s IEEE Andrew S. Grove Award, sponsored by the IEEE Electron Devices Society.

Silicon carbide’s humble beginnings

Decades before a Tesla Model 3 rolled off the assembly line with an SiC inverter, a small cadre of researchers, including Kimoto, foresaw the promise of silicon carbide technology. In obscurity they studied it and refined the techniques for fabricating power transistors with characteristics superior to those of the silicon devices then in mainstream use.

Today MOSFETs and other silicon carbide transistors greatly reduce on-state loss and switching losses in power-conversion systems, such as the inverters in an electric vehicle used to convert the battery’s direct current to the alternating current that drives the motor. Lower switching losses make the vehicles more efficient, reducing the size and weight of their power electronics and improving power-train performance. Silicon carbide–based chargers, which convert alternating current to direct current, provide similar improvements in efficiency.

But those tools didn’t just appear. “We had to first develop basic techniques such as how to dope the material to make n-type and p-type semiconductor crystals,” Kimoto says. N-type crystals’ atomic structures are arranged so that electrons, with their negative charges, move freely through the material’s lattice. Conversely, the atomic arrangement of p-type crystals’ contains positively charged holes.

Kimoto’s interest in silicon carbide began when he was working on his Ph.D. at Kyoto University in 1990.

“At that time, few people were working on silicon carbide devices,” he says. “And for those who were, the main target for silicon carbide was blue LED.

“There was hardly any interest in silicon carbide power devices, like MOSFETs and Schottky barrier diodes.”

Kimoto began by studying how SiC might be used as the basis of a blue LED. But then he read B. Jayant Baliga’s 1989 paper “Power Semiconductor Device Figure of Merit for High-Frequency Applications” in IEEE Electron Device Letters, and he attended a presentation by Baliga, the 2014 IEEE Medal of Honor recipient, on the topic.

“I was convinced that silicon carbide was very promising for power devices,” Kimoto says. “The problem was that we had no wafers and no substrate material,” without which it was impossible to fabricate the devices commercially.

In order to get silicon carbide power devices, “researchers like myself had to develop basic technology such as how to dope the material to make p-type and n-type crystals,” he says. “There was also the matter of forming high-quality oxides on silicon carbide.” Silicon dioxide is used in a MOSFET to isolate the gate and prevent electrons from flowing into it.

The first challenge Kimoto tackled was producing pure silicon carbide crystals. He decided to start with carborundum, a form of silicon carbide commonly used as an abrasive. Kimoto took some factory waste materials—small crystals of silicon carbide measuring roughly 5 millimeters by 8 mm­—and polished them.

He found he had highly doped n-type crystals. But he realized having only highly doped n-type SiC would be of little use in power applications unless he also could produce lightly doped (high purity) n-type and p-type SiC.

Connecting the two material types creates a depletion region straddling the junction where the n-type and p-type sides meet. In this region, the free, mobile charges are lost because of diffusion and recombination with their opposite charges, and an electric field is established that can be exploited to control the flow of charges across the boundary.

“Silicon carbide is a family with many, many brothers.”

By using an established technique, chemical vapor deposition, Kimoto was able to grow high-purity silicon carbide. The technique grows SiC as a layer on a substrate by introducing gasses into a reaction chamber.

At the time, silicon carbide, gallium nitride, and zinc selenide were all contenders in the race to produce a practical blue LED. Silicon carbide, Kimoto says, had only one advantage: It was relatively easy to make a silicon carbide p-n junction. Creating p-n junctions was still difficult to do with the other two options.

By the early 1990s, it was starting to become clear that SiC wasn’t going to win the blue-LED sweepstakes, however. The inescapable reality of the laws of physics trumped the SiC researchers’ belief that they could somehow overcome the material’s inherent properties. SiC has what is known as an indirect band gap structure, so when charge carriers are injected, the probability of the charges recombining and emitting photons is low, leading to poor efficiency as a light source.

While the blue-LED quest was making headlines, many low-profile advances were being made using SiC for power devices. By 1993, a team led by Kimoto and Hiroyuki Matsunami demonstrated the first 1,100-volt silicon carbide Schottky diodes, which they described in a paper in IEEE Electron Device Letters. The diodes produced by the team and others yielded fast switching that was not possible with silicon diodes.

“With silicon p-n diodes,” Kimoto says, “we need about a half microsecond for switching. But with a silicon carbide, it takes only 10 nanoseconds.”

The ability to switch devices on and off rapidly makes power supplies and inverters more efficient because they waste less energy as heat. Higher efficiency and less heat also permit designs that are smaller and lighter. That’s a big deal for electric vehicles, where less weight means less energy consumption.

Kimoto’s second breakthrough was identifying which form of the silicon carbide material would be most useful for electronics applications.

“Silicon carbide is a family with many, many brothers,” Kimoto says, noting that more than 100 variants with different silicon-carbon atomic structures exist.

The 6H-type silicon carbide was the default standard phase used by researchers targeting blue LEDs, but Kimoto discovered that the 4H-type has much better properties for power devices, including high electron mobility. Now all silicon carbide power devices and wafer products are made with the 4H-type.

Silicon carbide power devices in electric vehicles can improve energy efficiency by about 10 percent compared with silicon, Kimoto says. In electric trains, he says, the power required to propel the cars can be cut by 30 percent compared with those using silicon-based power devices.

Challenges remain, he acknowledges. Although silicon carbide power transistors are used in Teslas, other EVs, and electric trains, their performance is still far from ideal because of defects present at the silicon dioxide–SiC interface, he says. The interface defects lower the performance and reliability of MOS-based transistors, so Kimoto and others are working to reduce the defects.

A career sparked by semiconductors

When Kimoto was an only child growing up in Wakayama, Japan, near Osaka, his parents insisted he study medicine, and they expected him to live with them as an adult. His father was a garment factory worker; his mother was a homemaker. His move to Kyoto to study engineering “disappointed them on both counts,” he says.

His interest in engineering was sparked, he recalls, when he was in junior high school, and Japan and the United States were competing for semiconductor industry supremacy.

At Kyoto University, he earned bachelor’s and master’s degrees in electrical engineering, in 1986 and 1988. After graduating, he took a job at Sumitomo Electric Industries’ R&D center in Itami. He worked with silicon-based materials there but wasn’t satisfied with the center’s research opportunities.

He returned to Kyoto University in 1990 to pursue his doctorate. While studying power electronics and high-temperature devices, he also gained an understanding of material defects, breakdown, mobility, and luminescence.

“My experience working at the company was very valuable, but I didn’t want to go back to industry again,” he says. By the time he earned his doctorate in 1996, the university had hired him as a research associate.

He has been there ever since, turning out innovations that have helped make silicon carbide an indispensable part of modern life.

Growing the silicon carbide community at IEEE

Kimoto joined IEEE in the late 1990s. An active volunteer, he has helped grow the worldwide silicon carbide community.

He is an editor of IEEE Transactions on Electron Devices, and he has served on program committees for conferences including the International Symposium on Power Semiconductor Devices and ICs and the IEEE Workshop on Wide Bandgap Power Devices and Applications.

“Now when we hold a silicon carbide conference, more than 1,000 people gather,” he says. “At IEEE conferences like the International Electron Devices Meeting or ISPSD, we always see several well-attended sessions on silicon carbide power devices because more IEEE members pay attention to this field now.”

The need to mitigate climate change is driving a need to electrify our infrastructure, vehicles, and appliances, which can then be charged and powered by renewable energy sources. The most visible and impactful electrification is now under way for electric vehicles (EVs). Beyond the transition to electric engines, several new features and technologies are driving the electrification of vehicles. The number of sensors in a vehicle is skyrocketing, driven by autonomous driving and other safety features, while a modern software-defined vehicle (SDV) is electrifying everything from air-conditioned seats to self-parking technology.

An important technology for EVs and SDVs is power modules. These are super high-voltage devices that convert one form of electricity to another (e.g., AC to DC), which is necessary to convert the vehicle battery energy to a current that can run the vehicles electrical system, including the drive train. These modules demand the highest power loads and are rated at 1000s of voltages – and the design of power devices, which are the fundamental electronic component of the power modules, is crucial, as a bad design can lead to catastrophe events.

Power devices, much more than other types of electrical devices, are designed for specific applications. In comparison, logic transistors can be used in everything from toasters to smartphones. Not only does the architecture of power devices change at higher voltages, different power ratings, or higher switching frequencies as needed, but the material can change as well.

New power requirements need wide-band gap materials

To meet new and future power demands for EVs, electric infrastructure, and other novel electrical systems, wide-band gap (WBG) materials are being developed and introduced. Silicon carbide (SiC) IGBTs are now available and being deployed, while gallium arsenide (GaN) HEMTs are a promising technology that is in the development stage.

Power density vs. switching frequency of power devices based on different materials.

Continuing with our EV example, SiC inverters can generally increase the potential range by approximately 10%, even after accounting for other design considerations. In addition, increasing the drive train voltage from 400V range to 800V can reduce the charging speeds by half. These voltages are only possible to realize with wide-band gap materials like SiC-based power devices. Tesla introduced SiC MOSFETs into its Model S back in 2018. Since then, numerous automotive manufacturers have also adopted SiC in their EVs, including Hyundai and BMW, for example.

GaN still has many design hurdles to overcame to improve reliability and decrease cost – but if it can be made affordable, perhaps the next realization of EVs will allow for charging in seconds with ranges of thousands of miles.

Simulating power devices

Because of the huge number of design parameters, simulation is important in the design of power devices. One crucial part for device design is the calculation of the breakdown voltage – the voltage at which the device can essentially melt, or catch fire, but will never operate again. These simulations need to be highly physics-based and capture the mechanisms by which electrons can be released or absorbed by the crystal lattice of these materials. The increasing band gaps in WBG materials like SiC and GaN increase the breakdown voltage. In addition, these materials have a smaller effective electron mass (i.e., the mass of an electron in a material dictates how fast it will move in an electric field) – which makes the switching frequency in devices based on these WBG materials faster.

A critical area of all electronics design is variability and reliability. Device performance needs to be stable and last a long time. A key factor for variability and reliability is defects in the crystal lattice. These defects, or traps, act as charge centers that can drastically impact how well a device works. Simulation can also help to identify the types of traps, providing a mechanistic understanding of how the traps will impact the device physics. Recently, Synopsys issued a paper using first-principles quantum solutions to characterize specific traps in SiC with QuantumATK.

Going forward, wind energy, solar, home appliances, and even the electric grid itself are going to need new devices with different structures and materials. The future is extremely exciting for power devices, which can be found in our EVs and will soon power a huge range of applications across our society.

The post Enabling New Applications With SiC IGBT And GaN HEMT For Power Module Design appeared first on Semiconductor Engineering.

The need to mitigate climate change is driving a need to electrify our infrastructure, vehicles, and appliances, which can then be charged and powered by renewable energy sources. The most visible and impactful electrification is now under way for electric vehicles (EVs). Beyond the transition to electric engines, several new features and technologies are driving the electrification of vehicles. The number of sensors in a vehicle is skyrocketing, driven by autonomous driving and other safety features, while a modern software-defined vehicle (SDV) is electrifying everything from air-conditioned seats to self-parking technology.

An important technology for EVs and SDVs is power modules. These are super high-voltage devices that convert one form of electricity to another (e.g., AC to DC), which is necessary to convert the vehicle battery energy to a current that can run the vehicles electrical system, including the drive train. These modules demand the highest power loads and are rated at 1000s of voltages – and the design of power devices, which are the fundamental electronic component of the power modules, is crucial, as a bad design can lead to catastrophe events.

Power devices, much more than other types of electrical devices, are designed for specific applications. In comparison, logic transistors can be used in everything from toasters to smartphones. Not only does the architecture of power devices change at higher voltages, different power ratings, or higher switching frequencies as needed, but the material can change as well.

New power requirements need wide-band gap materials

To meet new and future power demands for EVs, electric infrastructure, and other novel electrical systems, wide-band gap (WBG) materials are being developed and introduced. Silicon carbide (SiC) IGBTs are now available and being deployed, while gallium arsenide (GaN) HEMTs are a promising technology that is in the development stage.

Power density vs. switching frequency of power devices based on different materials.

Continuing with our EV example, SiC inverters can generally increase the potential range by approximately 10%, even after accounting for other design considerations. In addition, increasing the drive train voltage from 400V range to 800V can reduce the charging speeds by half. These voltages are only possible to realize with wide-band gap materials like SiC-based power devices. Tesla introduced SiC MOSFETs into its Model S back in 2018. Since then, numerous automotive manufacturers have also adopted SiC in their EVs, including Hyundai and BMW, for example.

GaN still has many design hurdles to overcame to improve reliability and decrease cost – but if it can be made affordable, perhaps the next realization of EVs will allow for charging in seconds with ranges of thousands of miles.

Simulating power devices

Because of the huge number of design parameters, simulation is important in the design of power devices. One crucial part for device design is the calculation of the breakdown voltage – the voltage at which the device can essentially melt, or catch fire, but will never operate again. These simulations need to be highly physics-based and capture the mechanisms by which electrons can be released or absorbed by the crystal lattice of these materials. The increasing band gaps in WBG materials like SiC and GaN increase the breakdown voltage. In addition, these materials have a smaller effective electron mass (i.e., the mass of an electron in a material dictates how fast it will move in an electric field) – which makes the switching frequency in devices based on these WBG materials faster.

A critical area of all electronics design is variability and reliability. Device performance needs to be stable and last a long time. A key factor for variability and reliability is defects in the crystal lattice. These defects, or traps, act as charge centers that can drastically impact how well a device works. Simulation can also help to identify the types of traps, providing a mechanistic understanding of how the traps will impact the device physics. Recently, Synopsys issued a paper using first-principles quantum solutions to characterize specific traps in SiC with QuantumATK.

Going forward, wind energy, solar, home appliances, and even the electric grid itself are going to need new devices with different structures and materials. The future is extremely exciting for power devices, which can be found in our EVs and will soon power a huge range of applications across our society.

The post Enabling New Applications With SiC IGBT And GaN HEMT For Power Module Design appeared first on Semiconductor Engineering.

By Adam Kovac, Karen Heyman, and Liz Allan.

India approved the construction of two fabs and a packaging house, for a total investment of about $15.2 billion, according to multiple sources. One fab will be jointly owned by Tata and Taiwan’s Powerchip. The second fab will be a joint investment between CG Power, Japan’s Renesas Electronics, and Thailand’s Stars Microelectronics. Tata will run the packaging facility, as well. India expects these efforts will add 20,000 advanced technology jobs and 60,000 indirect jobs, according to the Times of India. The country has been talking about building a fab for at least the past couple of decades, but funding never materialized.

The U.S. Department of Commerce (DoC) issued a CHIPS Act-based Notice of Funding Opportunity for R&D to establish and accelerate domestic capacity for advanced packaging substrates and substrate materials. The U.S. Secretary of Commerce said the government is prioritizing CHIPS Act funding for projects that will be operational by 2030 and anticipates America will produce 20% of the world’s leading-edge logic chips by the end of the decade.

The top three foundries plan to implement backside power delivery as soon as the 2nm node, setting the stage for faster and more efficient switching in chips, reduced routing congestion, and lower noise across multiple metal layers. But this novel approach to optimizing logic performance depends on advances in lithography, etching, polishing, and bonding processes.

Intel spun out Altera as a standalone FPGA company, the culmination of a rebranding and reorganization of its former Programmable Solutions Group. The move follows Intel’s decision to keep Intel Foundry at arm’s length, with a clean line between the foundry and the company’s processor business.

Multiple new hardware micro-architecture vulnerabilities were published in the latest Common Weakness Enumeration release this week, all related to transient execution (CWE 1420-1423).

The U.S. Office of the National Cyber Director (ONCD) published a technical report calling for the adoption of memory safe programming languages, aiming to reduce the attack surface in cyberspace and anticipate systemic security risk with better diagnostics. The DoC also is seeking information ahead of an inquiry into Chinese-made connected vehicles “to understand the extent of the technology in these cars that can capture wide swaths of data or remotely disable or manipulate connected vehicles.”

Quick links to more news:

Design and Power
Manufacturing and Test
Automotive
Security
Pervasive Computing and AI
Events

Design and Power

Micron began mass production of a new high-bandwidth chip for AI. The company said the HBM3E will be a key component in NVIDIA’s H2000 Tensor Core GPUs, set to begin shipping in the second quarter of 2024. HBM is a key component of 2.5D advanced packages.

Samsung developed a 36GB HBM3E 12H DRAM, saying it sets new records for bandwidth. The company achieved this by using advanced thermal compression non-conductive film, which allowed it to cram 12 layers into the area normally taken up by 8. This is a novel way of increasing DRAM density.

Keysight introduced QuantumPro, a design and simulation tool, plus workflow, for quantum computers. It combines five functionalities into the Advanced Design System (ADS) 2024 platform. Keysight also introduced its AI Data Center Test Platform, which includes pre-packaged benchmarking apps and dataset analysis tools.

Synopsys announced a 1.6T Ethernet IP solution, including 1.6T MAC and PCS Ethernet controllers, 224G Ethernet PHY IP, and verification IP.

Tenstorrent, Japan’s Leading-Edge Semiconductor Technology Center (LSTC) , and Rapidus are co-designing AI chips. LSTC will use Tenstorrent’s RISC-V and Chiplet IP for its forthcoming edge 2nm AI accelerator.

This week’s Systems and Design newsletter features these top stories:

• 2.5D Integration: Big Chip Or Small PCB: Defining whether a 5D device is a PCB shrunk to fit into a package or a chip that extends beyond the limits of a single die can have significant design consequences.
• Commercial Chiplets: Challenges of establishing a commercial chiplet.
• Accellera Preps New Standard For Clock-Domain Crossing: New standard aims to streamline the clock-domain crossing flow.
• Thinking Big: From Chips To Systems: Aart de Geus discusses the shift from chips to systems, next-generation transistors, and what’s required to build multi-die devices.
• Integration challenges for RISC-V: Modifying the source code allows for democratization of design, but it adds some hurdles for design teams (video).

Demand for high-end AI servers is driven by four American companies, which will account for 60% of global demand in 2024, according to Trendforce. NVIDIA is projected to continue leading the market, with AMD closing the gap due its lower cost model.

The EU consortium PREVAIL is accepting design proposals as it seeks to develop next-gen edge-AI technologies. Anchors include CEA-Leti, Fraunhofer-Gesellschaft, imec, and VTT, which will use their 300mm fabrication, design, and test facilities to validate prototypes.

Siemens joined an initiative to expand educational opportunities in the semiconductor space around the world. The Semiconductor Education Alliance was launched by Arm in 2023 and focuses on helping teach skills in IC design and EDA.

Q-CTRL announced partnerships with six firms that it says will expand access to its performance-management software and quantum technologies. Wolfram, Aqarios, and qBraid will integrate Q-CTRL’s Fire Opal technology into their products, while Qblox, Keysight, and Quantware will utilize Q-CTRL’s Boulder Opal hardware system.

NTT, Red Hat, NVIDIA, and Fujitsu teamed up to provide data pipeline acceleration and contain orchestration technologies targeted at real-time AI analysis of massive data sets at the edge.

Manufacturing and Test

The U.S. Department of Energy (DOE)’s Office of Electricity launched the American-Made Silicon Carbide (SiC)  Packaging Prize. This $2.25 million contest invites competitors to propose, design, build, and test state-of-the-art SiC semiconductor packaging prototypes.

Applied Materials introduced products and solutions for patterning issues in the “angstrom era,” including line edge roughness, tip-to-tip spacing limitations, bridge defects, and edge placement errors.

imec reported progress made in EUV processes, masks and metrology in preparation for high-NA EUV. It also identified advanced node lithography and etch related processes that contribute the most to direct emissions of CO2, along with proposed solutions.

proteanTecs will participate in the Arm Total Design ecosystem, which now includes more than 20 companies united around a charter to accelerate and simplify the development of custom SoCs based on Arm Neoverse compute subsystems.

NikkeiAsia took an in-depth look at Japan’s semiconductor ecosystem and concluded it is ripe for revival with investments from TSMC, Samsung, and Micron, among others. TrendForce came to a similar conclusion, pointing to the fast pace of Japan’s resurgence, including the opening of TSMC’s fab.

‍FormFactor closed its sale of its Suzhou and Shanghai companies to Grand Junction Semiconductor for $25M in cash.

The eBeam Initiative celebrated its 15th anniversary and welcomed a new member, FUJIFILM. The group also uncorked its fourth survey of its members technology using deep learning in the photomask-to-wafer manufacturing flow.

Automotive

Apple shuttered its electric car project after 10 years of development. The chaotic effort cost the company billions of dollars, according to The New York Times.

Infineon released new automotive programmable SoCs with fifth-gen human machine interface (HMI) technology, offering improved sensitivity in three packages. The MCU offers up to 84 GPIOs and 384 KB of flash memory. The company also released automotive and industrial-grade 750V G1 discrete SiC MOSFETs aimed at applications such as EV charging, onboard chargers, DC-DC converters, energy, solid state circuit breakers, and data centers.

Cadence expanded its Tensilica IP portfolio to boost computation for automotive sensor fusion applications. Vision, radar, lidar, and AI processing are combined in a single DSP for multi-modal, sensor-based system designs.

Ansys will continue translating fast computing into fast cars, as the company’s partnership with Oracle Red Bull Racing was renewed. The Formula 1 team uses Ansys technology to improve car aerodynamics and ensure the safety of its vehicles.

Lazer Sport adopted Siemens’ Xcelerator portfolio to connect 3D design with 3D printing for prototyping and digital simulation of its sustainable KinetiCore cycling helmet.

The chair of the U.S. Federal Communications Commission (FCC) suggested automakers that sell internet-connected cars should be subject to a telecommunications law aiming to protect domestic violence survivors, reports CNBC. This is due to emerging cases of stalking through vehicle location tracking technology and remote control of functions like locking doors or honking the horn.

BYD‘s CEO said the company does not plan to enter the U.S. market because it is complicated and electrification has slowed down, reports Yahoo Finance. Meanwhile, the first shipment of BYD vehicles arrived in Europe, according to DW News.

Ascent Solar Technologies’ solar module products will fly on NASA’s upcoming Lightweight Integrated Solar Array and AnTenna (LISA-T) mission.

Security

Researchers at Texas A&M University and the University of Delaware proposed the first red-team attack on graph neural network (GNN)-based techniques in hardware security.

A panel of four experts discuss mounting concerns over quantum security, auto architectures, and supply chain resiliency.

Synopsys released its ninth annual Open Source Security and Risk Analysis report, finding that 74% of code bases contained high-risk open-source vulnerabilities, up 54% since last year.

President Biden issued an executive order to prevent the large-scale transfer of Americans’ personal data to countries of concern. Types of data include genomic, biometric, personal health, geolocation, financial, and other personally identifiable information, which bad actors can use to track and scam Americans.

The National Institute of Standards and Technology (NIST) released Cybersecurity Framework (CSF) 2.0 to provide a comprehensive view for managing cybersecurity risk.

The EU Agency for Cybersecurity (ENISA) published a study on best practices for cyber crisis management, saying the geopolitical situation continues to impact the cyber threat landscape and planning for threats and incidents is vital for crisis management.

The U.S. Department of Energy (DOE) announced $45 million to protect the energy sector from cyberattacks.

The National Security Agency (NSA), the Federal Bureau of Investigation (FBI), and others published an advisory on Russian cyber actors using compromised routers.  Also the Cybersecurity and Infrastructure Security Agency (CISA), the UK National Cyber Security Centre (NCSC), and partners advised of tactics used by Russian Foreign Intelligence Service cyber actors to gain initial access into a cloud environment.

CISA, the FBI, and the Department of Health and Human Services (HHS) updated an advisory concerning the ALPHV Blackcat ransomware as a service (RaaS), which primarily targets the healthcare sector.

CISA also published a guide to support university cybersecurity clinics and issued other alerts.

Pervasive Computing and AI

Renesas expanded its RZ family of MPUs with a single-chip AI accelerator that offers 10 TOPS per watt power efficiency and delivers AI inference performance of up to 80 TOPS without a cooling fan. The chip is aimed at next-gen robotics with vision AI and real-time control.

Infineon launched dual-phase power modules to help data centers meet the power demands of AI GPU platforms. The company also released a family of solid-state isolators to deliver faster switching with up to 70% lower power dissipation.

Fig. 1: Infineon’s dual phase power modules: Source: Infineon

Amber Semiconductor announced a reference design for brushless motor applications using its AC to DC conversion semiconductor system to power ST‘s STM32 MCUs.

Micron released its universal flash storage (UFS) 4.0 package at just 9×13 mm, built on 232-layer 3D NAND and offering up to 1 terabyte capacity to enable next-gen phone designs and larger batteries.

LG and Meta teamed up to develop extended reality (XR) products, content, services, and platforms within the virtual space.

Microsoft and Mistral AI partnered to accelerate AI innovation and to develop and deploy Mistral’s next-gen large language models (LLMs).

Microsoft’s vice chair and president announced the company’s AI access principles, governing how it will operate AI datacenter infrastructure and other AI assets around the world.

Singtel and VMware partnered to enable enterprises to manage their connectivity and cloud infrastructure through the Singtel Paragon platform for 5G and edge cloud.

Keysight was selected as the Test Partner for the Deutsche Telekom Satellite NB-IoT Early Adopter Program, providing an end-to-end NB-IoT NTN testbed that allows designers and developers to validate reference designs for solutions using 3GPP Release 17 (Rel-17) NTN standards.

Global server shipments are predicted to increase by 2.05% in 2024, with AI servers accounting for about 12%, reports TrendForce. Also, the smartphone camera lens market is expected to rebound in 2024 with 3.8% growth driven by AI-smartphones, to reach about 4.22 billion units, reports TrendForce.

Yole released a smartphone camera comparison report with a focus on iPhone evolution and analysis of the structure, design, and teardown of each camera module, along with the CIS dimensions, technology node, and manufacturing processes.

Counterpoint released a number of 2023 reports on smartphone shipments by country and operator migrations to 5G.

Events

Find upcoming chip industry events here, including:

Upcoming webinars are here, including topics such as digital twins, power challenges in data centers, and designing for 112G interface compliance.

Further Reading and Newsletters

Read the latest special reports and top stories, or check out the latest newsletters:

Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials
Automotive, Security and Pervasive Computing

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